Datasheet

AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
Table 2-15. Serial Communication Interfaces – McSPI Signals Description (continued)
SIGNAL NAME [1] DESCRIPTION [2] TYPE [3] ZCN BALL [4] ZER BALL [4]
mcspi1_simo Slave data in, master data IO AD15 K19
out
mcspi1_somi Slave data out, master IO AC15 J18
data in
mcspi1_cs0 SPI Enable 0, polarity IO AB15 K18
configured by software
mcspi1_cs1 SPI Enable 1, polarity O AD14 J20
configured by software
mcspi1_cs2 SPI Enable 2, polarity O AE15 J19
configured by software
mcspi1_cs3 SPI Enable 3, polarity O AE16 J21
configured by software
MULTICHANNEL SERIAL PORT INTERFACE (McSPI2)
mcspi2_clk SPI Clock IO AD16,AC9 J22
mcspi2_simo Slave data in, master data IO AC16,AD9 H20
out
mcspi2_somi Slave data out, master IO AB16,AE9 H22
data in
mcspi2_cs0 SPI Enable 0, polarity IO AA16,AA10 H21
configured by software
mcspi2_cs1 SPI Enable 1, polarity O AE17 H19
configured by software
MULTICHANNEL SERIAL PORT INTERFACE (McSPI3)
mcspi3_clk SPI Clock IO W25,AD11,AA18 C13, M21, G19, E20
mcspi3_simo Slave data in, master data IO V24,AE11,AD18 C15, M20, G20
out
mcspi3_somi Slave data out, master IO V25, AB12, AC18 A13, K20, F22
data in
mcspi3_cs0 SPI Enable 0, polarity IO U21,AE12,AB18 B13, K21, F20
configured by software
mcspi3_cs1 SPI Enable 1, polarity O U22, AD12, AB19 C14, M18, E21
configured by software
MULTICHANNEL SERIAL PORT INTERFACE (McSPI4)
mcspi4_clk SPI Clock IO W20, R25 C20, B11
mcspi4_simo Slave data in, master data IO P22 C10
out
mcspi4_somi Slave data out, master IO P23 C9
data in
mcspi4_cs0 SPI Enable 0, polarity IO P24 C11
configured by software
Table 2-16. Serial Communication Interfaces – HECC Signals Description
SIGNAL NAME [1] DESCRIPTION [2] TYPE [3] ZCN BALL [4] ZER BALL [4]
hecc1_txd Transmit serial data pin O V2 AB15
hecc1_rxd Receive serial data pin I V3 AB16
Table 2-17. Serial Communication Interfaces – EMAC (RMII) Signals Description
SIGNAL NAME [1] DESCRIPTION [2] TYPE [3] ZCN BALL [4] ZER BALL [4]
rmii_mdio_data Management data I/O IO AE6 U21
rmii_mdio_clk Management data clock O AD6 U22
rmii_rxd0 EMAC receive data pin 0 I Y7 T19
rmii_rxd1 EMAC receive data pin 1 I AA7 T20
Copyright © 2009–2013, Texas Instruments Incorporated Terminal Description 65
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