Datasheet

SRAM_LDO1
SRAM_LDO2
WKUP_LDO
DPLL_MPU
DPLL_CORE
vdds_dpll_mpu
_usbhost
vdds_sram_mpu
DPLL5
DPLL4
vdds_dpll_per_core
Video DAC
vdda_dac
Device
VSS
vssa_dac
Cvdds_sram_mpu
vdds_sram_core_bg
Ccap_vdd_sram_core
Cvdds_dpll_mpu_usbhost
Cvdds_dpll_per_core
Cvdda_dac
vdda_dac
vdds_dpll_per_core
vdds_dpll_mpu_usbhost
Core
vdd_core
Cvdd_core
Vdd_core
030-004
MPU
BG
Cvdds_sram_core_bg
Cvdd_sram_core
cap_vdd_sram_mpu
Ccap_vdd_sram_mpu
vdd_sram_core
cap_vdd_sram
_core
vdds_sram_mpu
vdd_sram_core
vdds_sram_core_bg
AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
The following illustrates an example of power supply decoupling.
(1) Decoupling capacitors must be placed as closed as possible to the power ball. Choose the ground located closest to the power pin
for each decoupling capacitor. Place the decoupling capacitor Ci in a group of 1, 2, or 3 balls; the total must be equal to the
decoupling requirement. In case you interconnect powers, first insert the decoupling capacitor and then interconnect the powers.
(2) The decoupling capacitor value depends on the board characteristics.
Figure 3-2. Power Supply Decoupling
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