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AMC6821

 

  

FEATURES DESCRIPTION

APPLICATIONS

Alarm

Detectors

AMC6821

FAN-FAULT

THERM

OVR

IN+

IN-

Remote

Temperature

Sensing

Temperature

Data

MUX

On-Chip

TemperatureSensor

Ref

ADC

(11-Bit)

SMBus

I C

Interface

PWM

Driver

TACH-DATA

TACHCOUNTER

AutoFanSpeed

Controller

PWM-MODE

PWM-Out

TACH

SCLK

SDA

SMBALERT

GND

AMC6821

SBAS386C – MAY 2006 – REVISED JULY 2007

Intelligent Temperature Monitor and PWM Fan Controller

23456

• Remote Temperature Sensor:

The AMC6821 is an intelligent temperature monitor

± 2 ° C Accuracy, 0.125 ° C Resolution

and pulse-width modulation (PWM) fan controller. It is

designed for noise-sensitive or power-sensitive

• Local Temperature Sensor:

applications that require active system cooling. Using

± 2 ° C Accuracy, 0.125 ° C Resolution

either a low-frequency or a high-frequency PWM

• PWM Controller

signal, this device can simultaneously drive a fan,

• PWM Frequency: 10Hz to 40kHz

monitor remote sensor diode temperatures, and

Duty Cycle: 0% to 100%, 8 Bits

measure and control the fan speed so that it operates

with minimal acoustic noise at the lowest possible

• Automatic Fan Speed Control Loops

speed.

• SMBus Interface

The AMC6821 has three fan control modes: Auto

• Power: 2.7V to 5.5V

Temperature-Fan mode, Software-RPM mode, and

• Package (Green): QSOP-16 (4mm × 5mm)

Software-DCY mode. Each mode controls the fan

• RoHS Compliant

speed by changing the duty cycle of a PWM output.

Auto Temperature-Fan mode is an intelligent,

closed-loop control that optimizes fan speed

according to user-defined parameters. This mode

• Notebook and Desktop PCs

allows the AMC6821 to run as a stand-alone device

• Network Servers

without CPU intervention; the fan can continue to be

• Telecommunications Equipment

controlled (based on temperature measurements)

even if the CPU or system locks up. Software-RPM

• PC-Based Equipment

mode is a second closed-loop control. In this mode,

• DLP™ and LCD Projectors

the AMC6821 adjusts the PWM output to maintain a

consistent fan speed at a user-specified target value;

that is, the device functions as a fan speed regulator.

Software-RPM mode can also be used to allow the

AMC6821 to operate as a stand-alone device. The

third mode, Software-DCY, is open-loop. In

Software-DCY mode, the PWM duty cycle is set

directly by the value written to the device.

The AMC6821 has a programmable SMBALERT

output to indicate error conditions and a dedicated

FAN-FAULT output to indicate fan failure. The

THERM pin is a fail-safe output for over-temperature

conditions that can be used to throttle a CPU clock.

Additionally, the OVR pin indicates the

over-temperature limit as well. All of the alarm

thresholds are set through the device registers. The

AMC6821 is available in a QSOP-16 package.

Patents 7, 083,328 and 7,098,617.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 DLP is a trademark of Texas Instruments.

3 Pentium M, Pentium-IV are trademarks of Intel.

4 JMC is a trademark of JMC Products.

5 I2C is a trademark of Philips International, Inc.

6 All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (56 pages)

PAGE 1
AM AMC6821 C6 821 SBAS386C – MAY 2006 – REVISED JULY 2007 Intelligent Temperature Monitor and PWM Fan Controller FEATURES DESCRIPTION 1 • Remote Temperature Sensor: ±2°C Accuracy, 0.125°C Resolution • Local Temperature Sensor: ±2°C Accuracy, 0.125°C Resolution • PWM Controller • PWM Frequency: 10Hz to 40kHz Duty Cycle: 0% to 100%, 8 Bits • Automatic Fan Speed Control Loops • SMBus Interface • Power: 2.7V to 5.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 ELECTRICAL CHARACTERISTICS At TA = –40°C to +100°C and VDD = +3V or +5V, unless otherwise noted. AMC6821 PARAMETER CONDITIONS MIN TYP MAX UNIT TEMPERATURE MEASUREMENT Local sensor accuracy Remote sensor accuracy (1) TA = 0°C to +90°C ±0.5 ±2.0 °C TA = –25°C to +100°C ±1.0 ±3.0 °C TR = +50°C to +100°C ±0.5 ±2.0 °C ±3.0 °C TR = –40°C to +125°C ±1.0 Sensor resolution Both channels 0.125 °C Conversion time Two channels 62.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 SDA tLOW tF tSU:DAT tF tHD:STA tF tBUF tR SCLK S tSU:STA tHD:STA tHD:DAT tHIGH tSU:STO Sr P S Figure 1. Timing Specification TIMING REQUIREMENTS At VDD = +3V or +5V, and TA = –40°C to +125°C, unless otherwise noted. AMC6821 PARAMETER MIN TYP MAX UNIT 100 kHz fSCLK Clock frequency tBUF Bus free time 4.7 µs tSU:STA Start setup time 4.7 µs tHD:STA Start hold time 4.0 µs tSU:STO Stop condition setup time 4.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 DEVICE INFORMATION SSOP-16 (body size: 5mm x 4mm) PWM-OUT 1 16 SCLK TACH 2 15 SDA OVR 3 14 SMBALERT NC 4 GND 5 12 A1 VDD 6 11 PWM-MODE THERM 7 10 IN+ FAN-FAULT 8 9 AMC6821 13 A0 IN- Table 1. TERMINAL FUNCTIONS NAME PIN NO. PWM-OUT 1 DESCRIPTION Digital output, open-drain. PWM output to control fan speed. TACH 2 Digital input. Fan tachometer input to measure the fan speed.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 TYPICAL CHARACTERISTICS At TA = +25°C and VDD = 5V, unless otherwise noted. REMOTE CHANNEL ERROR vs REMOTE TEMPERATURE LOCAL CHANNEL ERROR FROM CALIBRATED BATH 3 2 Local Channel Error (°C) Remote Channel Error (°C) 3 Remote Error, VDD = 3V 1 0 -1 Remote Error, VDD = 5V -2 2 VDD = 5V 1 0 VDD = 3V -1 -2 -3 -3 0 -20 -40 20 40 60 80 100 120 -40 0 -20 Remote Temperature (°C) 40 60 80 Figure 2. Figure 3.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C and VDD = 5V, unless otherwise noted. TEMPERATURE ERROR vs DIFFERENTIAL MODE NOISE FREQUENCY TEMPERATURE ERROR vs CAPACITANCE BETWEEN IN+ AND IN– 5 4 Remote Channel Error (°C) Remote Channel Error (°C) 5 20mVPP 3 2 1 10mVPP 0 0 -5 -10 -15 -1 10k 100k 1M 10M 0.1 0 100M 1.0 10.0 Capacitance IN+ to IN- (nF) Frequency (Hz) Figure 8. Figure 9.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 SMBUS INTERFACE The AMC6821 communicates through the serial system management bus (SMBus). The AMC6821 is connected to this bus as a slave device, under the control of a bus master. The AMC6821 has a 7-bit serial bus address that is programmable by properly connecting the address pins A0 and A1. Table 2 shows the selection of the AMC6821 slave address. The address selection pins should be either tied directly to VDD or GND.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Table 6. Write Multiple Bytes S SLAVE ADDRESS WR ACK COMMAND 7-bit AMC6821 slave address ACK 8-bit register address of first register to be written DATA ACK DATA ACK First 8-bit data written first register DATA ...
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 In the write multiple bytes operation, the address pointer of the AMC6821 increments by '1' after the data are written, until it reaches the last register address (0x3F). If the host continues to transfer data into the AMC6821 after writing the last location, all data are ignored until the operation stops.
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AMC6821 www.ti.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 APPLICATION INFORMATION ADC CONVERTER The AMC6821 has an 11-bit, on-chip analog-to-digital converter (ADC), as shown in Figure 11. This ADC converts the analog input into digital format. The analog input is passed through front-end signal conditioning circuitry to remove the noise. The resulting signal is then converted by the ADC.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 The remote sensing transistor can be a substrate transistor built within the microprocessor (as in a Pentium-IV), or a discrete small-signal type transistor. This architecture is shown in Figure 13. The internal bias diode biases the IN– terminal above ground to prevent the ground noise from interfering with the measurement. An external capacitor (up to 1000pF) may be placed between IN+ and IN– to further reduce the noise from interfering.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Table 11.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 4. THERM Limit: This limit is an additional fail-safe threshold. When the local or remote temperature is equal to or above this limit, the corresponding L-THERM or R-THERM bit is set ('1'), and the THERM pin is asserted low, which can be used to throttle the CPU clock. Furthermore, the THERM interrupt is generated on the SMBALERT pin if enabled (THERMOVIE = 1). Reading Status Register 1 clears the R-THERM and L-THERM bits.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Remote Temperature Sensor Failure Detection The remote temperature sensor failure detection determines whether the remote sensor diode has an open-circuit condition, a short-circuit to ground, or a short-circuit (IN+) to (IN–) condition. This fault detection is based on the analog input voltage and is not checked until the first monitoring cycle is completed after power-on. Reading the fault sensor returns a value of –128°C (0x80).
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Table 12.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 TACH-DATA Register Two fan tach pulse periods (PSPR = 0) or four tach pulse periods (PSPR = 1) are measured and the result is stored in the TACH-DATA Register, as shown in Figure 17.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Some fans (such as the JMC™ four-wire fan) are powered directly by dc power, instead of being powered by the PWM. In this case, the TACH mode must be set to '1'. When TACH-MODE = 1, the PWM-Out pin is not forced ON; instead, the status is controlled completely by the DCY register, just as in normal operation. Setting TACH-MODE to '1' also disables the internal correction circuit because no extra duty cycle is applied.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 FAN FAILURE DETECTION When the TACH data are larger than the TACH low limit, the fan runs at a speed below the predefined minimum RPM. When this condition occurs, a spin-up process is applied to start the fan again when spin-up is enabled. Bits [STIME2:STIME0] of the Fan Characteristics Register define this time period. Figure 19 shows the function of the fan failure detection. Refer to the Fan Spin-Up section.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 The SMBALERT pin continues to generate interrupts after the assertion of the FAN-FAULT pin because the tach measurement continues even after a fan failure. Should the fan recover from the failure condition, the FAN-FAULT pin signal is negated and the fan returns to normal operating speed. Figure 20 shows the operation of a FANS interrupt.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 FAN CONTROL THERM Pin and External Hardware Control The THERM pin is a bi-directional I/O, as shown in Figure 22. THERM Pin As An Output As an open-drain output, the THERM pin is the indicator of temperature over the THERM limit.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 When the THERM limit is exceeded, the corresponding status flag bit (R-THERM or L-THERM of Status Register 1 or Status Register 2) is set to '1', and the THERM interrupt through the SMBALERT pin is generated if it is enabled (THERMOVIE of bit Configuration Register 1 is set to '1'). This interrupt forces the SMBALERT pin low. Note that the THERM pin is always forced to low when R-THERM = 1 or L-THERM = 1, no matter what the status of THERMOVIE is.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Fan Spin-Up The PWM duty cycle controls the cooling fan speed. To spin up a fan from a stopped state or under-speed status, the spin-up process is applied to overcome the fan inertia. During the first third of spin-up, the duty cycle of the PWM gradually increases from 33.3% to 100%, and then maintains at 100% through the rest of the process. At the end of the spin-up process, the duty cycle is adjusted to 33.3%.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Normal Fan Speed Control The fan speed is controlled by four different modes: • software DCY control; • software RPM control, • auto remote temperature fan control; • maximum fast-speed calculated control. The Auto Temperature-Fan Control mode consists of auto remote temperature-fan control and maximum fast-speed calculated control. It is an intelligent closed-loop control.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 The monitoring and adjustment is made once every second, or once every 250ms, as determined by the TACH-FAST bit of Configuration Register 4 (bit 5, 0x04). Bits [STEP1:STEP0] of the DCY-RAMP Register define the allowed amount of each adjustment. When the difference between the values of the TACH-DATA and TACH Setting Registers are equal to or less than 0x000A, the adjustment finishes. 0x000A corresponds to about 1.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Auto Temperature Fan Mode The Auto Temperature-Fan mode is a closed-loop control that optimizes fan speed for a given temperature to intelligently manage the system thermals/acoustics. It runs stand-alone even without the intervention of a controller. The AMC6821 has two auto temperature fan control modes. When the bits [FDRC1:FDRC0] = [10] (default), the fan is in the Auto Remote Temperature-Fan Speed control mode.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 The bits [R-TEMP4:R-TEMP0] of the Remote TEMP-FAN Control Register and the bits [L-TEMP4:L-TEMP0] of the Local TEMP-FAN Control Register are the low temperature bits that define the low temperature of the control loops. Bits [SPL2:SPL0] of these registers are the slope bits that define the increment of the duty cycle when the temprature increases 1°C.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 When the actual duty cycle is different from the desired value, the duty cycle is adjusted automatically. When the RAMPE bit of the DCY-RAMP Register is cleared ('0'), the duty cycle changes to the desired value immediately after being calculated. When the RAMPE bit is '1', the duty cycle changes to the new value gradually. The DCY-RAMP Register specifies how quickly the duty cycle changes. The duty cycle can be checked every 0.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 INTERRUPT The AMC6821 provides two interrupt output pins, OVR and SMBALERT. OVR Pin OVR is an open-drain output pin that works as an over-critical temperature limit (shutdown threshold) indicator and remote sensor failure indicator. This architecture is shown in Figure 30. Setting the OVREN bit of Configuration Register 4 to '1' enables this pin; clearing OVREN ('0') disables it. When disabled, the OVR pin is in a high-impedance status.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Once a limit is exceeded, the corresponding status bit is set to '1'. The status bit remains set until the error condition subsides and the status register gets read. The status bits are referred to as being sticky because they remain set until read by software. This design ensures that out-of-limit events cannot be missed if the software is polling the device periodically.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Individual interrupts can be masked by clearing the corresponding interrupt enable bit in the configuration registers to prevent SMBALERT interrupts. Note that masking an interrupt source only prevents the SMBALERT pin output from being asserted; the appropriate status bit gets set as normal.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 REGISTER MAP All registers are 8-bit. Table 14 shows the memory map. Locations that are marked Reserved read back 0x0000 if they are read by the host. Writing to these locations has no effect. Table 14.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Table 14. Memory Map (continued) ADDR NAME R/W DEFAULT BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0 0 PSV8 PSV7 PSV6 PSV5 PSV4 PSV3 TEMPERATURE MONITORING (continued) 0x1C PSV-Temp R/W 0x00 Passive Cooling Temperature threshold. 3 LSBs and two MSBs are '0'. For details, refer to the passive cooling temperature limit in the Temperature Out-of-Range Detection section. Default = 0°C.
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AMC6821 www.ti.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 REGISTER DESCRIPTION In this section, all interrupts are the interrupt signal through the SMBALERT pin, unless otherwise noted. DEVICE CONFIGURATION REGISTERS Configuration Register 1 (Address 0x00, Value After Power-On Reset = 0xD4) BIT NAME R/W DEFAULT DESCRIPTION 7 THERMOVIE R/W 1 THERM interrupt enable. When this bit is set, the THERM interrupt is enabled. L-THERM = 1 or R-THERM = 1 causes an interrupt.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Configuration Register 2 (Address 0x01, Value After Power-On Reset = 0x3D) BIT NAME R/W DEFAULT DESCRIPTION 7 RST R/W 0 Reset bits. RST = 1 resets the device. Self-clears after reset. Always read '0'. Power-on default = 0. Reset is immediate on rising edge of SCLK of data LSB with no acknowledge. 6 PSVIE R/W 0 LPSV enable bit. Power-on default = 0.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Configuration Register 4 (Address 0x04, Value After Power-On Reset = 0x08) BIT NAME R/W DEFAULT DESCRIPTION 7 MODE R/W 0 Required configure bit: User must write a 1 to this location. 6 PSPR R/W 0 Number of pulses per revolution of the fan. Power-on default = 0. PLSPR = 0 for two pulses/revolution (default), PLSPR = 1 for four pulses per revolution.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 DEVICE STATUS REGISTERS Reading the status registers clears the appropriate status bit. Status register bits are sticky (except the RTF bit). Whenever a status bit is set, indicating an out-of-limit condition, it remains set until the event that caused it is resolved and the status register is read. The status bit can only be cleared by reading the status register after the event is resolved.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Status Register 2 (Address 0x03, Value After Power-On or Reset = 0x00) BIT NAME R/W DEFAULT DESCRIPTION 7 THERM-IN R 0 Status of the THERM pin as an input. When this input is pulled low, THERM-IN = 1, and the fan is driven at full speed. This bit is cleared when reading this register and be written to '1' if the pin persists "pulled-low". 0 Local temperature over the local THERM limit flag.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 In a write operation, the data written are the actual DCY driving the PWM-Out pin in the software DCY control mode. However, in all other control modes, the data being written are not used to drive the PWM. Instead, it is stored in a temporary register, and controls the PWM immediately after the control mode is changed to the software DCY control mode.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Fan Spin Disable Bit: FSPD This bit enables or disables the spin-up function. PWM Frequency Bits: [PWM2:PWM0] These bits specify the PWM frequency; the high range (1kHz–40kHz) has a default value of 25kHz, and the low range (10Hz–94Hz) has a default value of 30Hz. The clock frequency is 3.2MHz. The PWM-MODE pin determines which range is selected. When the PWM mode is tied to ground, the high range is selected; otherwise, the low range is selected.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Remote TEMP-FAN Control Register (Address 0x25, Value After Power-On or Reset = 0x61) BIT NAME DEFAULT 7 R-TEMP4 0 6 R-TEMP3 1 R-TEMP4 R-TEMP3 R-TEMP2 R-TEMP1 R-TEMP0 Low Temp 5 R-TEMP2 1 0 0 0 0 0 0°C 4 R-TEMP1 0 0 0 0 0 1 4°C 3 R-TEMP0 0 0 0 0 1 0 8°C 0 0 0 1 1 12°C ... ... ... ... ... ...
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 DCY-RAMP Register (Address 0x23, Value After Power-On or Reset = 0x52) BIT NAME DEFAULT DESCRIPTION 7 RAMPE 0 Ramp Enable Bit. Ignored in software-RPM control. When RAMPE = 1, Ramp is enabled. The DCY changes to the desired value gradually according to STEP bits and RATE bits. When RAMPE = 0, Ramp is disabled. DCY changes to the desired target value immediately. Default = 0.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Updating Rate Bits: [RATE2:RATE0] These bits define the rate (time/sec) that the duty cycle is recalculated in the auto temp-fan control mode. The value of [RATE2:RATE0] does not affect the ADC conversion rate. Both external and local temperature readings are updated continuously, even if the DCY is updated slowly.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Remote-Temp-DATA-HByte Register (Address 0x0B, Value After Power-On or Reset = 0x80, –128°C) Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) RT10 (MSB) RT9 RT8 RT7 RT6 RT5 RT4 RT3 Bits [RT10:RT3] are the eight MSBs of the newest remote temperature reading. It is important to note that temperature can be read as an 8-bit value (with 1°C resolution) from the Temp-DATA-Hbyte register, or as an 11-bit value (with 0.
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AMC6821 www.ti.com SBAS386C – MAY 2006 – REVISED JULY 2007 Remote-Low-Temp-Limit Register (Address 0x19, Value After Power-On or Reset = 0x00, 0°C) Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) RT-L10 (MSB) RT-L9 RT-L8 RT-L7 RT-L6 RT-L5 RT-L4 RT-L3 These bits are the lower bounds of the remote temperature.
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AMC6821 www.ti.
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AMC6821 www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device AMC6821SDBQR Package Package Pins Type Drawing SSOP DBQ 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) AMC6821SDBQR SSOP DBQ 16 2500 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.