Datasheet

bq2014 Registers
The bq2014 command and status registers are listed in
Table 6 and described below.
Command Register (CMDR)
The write-only CMDR register is accessed when eight
valid command bits have been received by the bq2014.
The CMDR register contains two fields:
n
W/R bit
n
Command address
The W/R
bit of the command register is used to select
whether the received command is for a read or a write
function.
The W/R
values are:
Where W/R
is:
0 The bq2014 outputs the requested register
contents specified by the address portion of
CMDR.
1 The following eight bits should be written
to the register specified by the address por-
tion of CMDR.
The lower seven-bit field of CMDR contains the address
portion of the register to be accessed. Attempts to write
to invalid addresses are ignored.
Primary Status Flags Register (FLGS1)
The read-only FLGS1 register (address=01h) contains
the primary bq2014 flags.
The charge status flag (CHGS) is asserted when a
valid charge rate is detected. Charge rate is deemed
valid when V
SRO
>V
SRQ
.AV
SRO
of less than V
SRQ
or
discharge activity clears CHGS.
The CHGS values are:
Where CHGS is:
0 Either discharge activity detected or V
SRO
<
V
SRQ
1V
SRO
> V
SRQ
The battery replaced flag (BRP) is asserted whenever
the potential on the SB pin (relative to V
SS
), V
SB
, falls
from above the maximum cell voltage, MCV (2.25V), or
rises above 0.1V. The BRP flag is also set when the
bq2014 is reset (see the RST register description). BRP
is reset when either a valid charge action increments
NAC to be equal to LMD, or a valid charge action is de
-
tected after the EDV1 flag is asserted. BRP = 1 signifies
that the device has been reset.
The BRP values are:
Where BRP is:
0 Battery is charged until NAC = LMD or dis-
charged until the EDV1 flag is asserted
1V
SB
dropping from above MCV, V
SB
rising
from below 0.1V, or a serial port initiated
reset has occurred
The battery removed flag (BRM) is asserted whenever
the potential on the SB pin (relative to V
SS
) rises above
MCV or falls below 0.1V. The BRM flag is asserted until
the condition causing BRM is removed. Because of sig
-
nal filtering, 30 seconds may have to transpire for BRM
to react to battery insertion or removal.
The BRM values are:
Where BRM is:
0 0.1V < V
SB
< 2.25V
1 0.1V > V
SB
or V
SB
> 2.25V
The capacity inaccurate flag (CI) is used to warn the
user that the battery has been charged a substantial
number of times since LMD has been updated. The CI
flag is asserted on the 64th charge after the last LMD
update or when the bq2014 is reset. The flag is cleared
after an LMD update.
10
bq2014
FLGS1 Bits
76543 2 1 0
CHGS - -- - - - -
FLGS1 Bits
76543 2 1 0
- BRP - - - - - -
CMDR Bits
765 4 3 2 1 0
- AD6 AD5 AD4 AD3 AD2 AD1
AD0
(LSB)
CMDR Bits
76543 2 1 0
W/R
- -- - - - -
FLGS1 Bits
76543 2 1 0
- - BRM - - - - -