Datasheet

Pin Descriptions
LCOM
LED common output
Open-drain output switches V
CC
to source
current for the LEDs. The switch is off dur
-
ing initialization to allow reading of the soft
pull-up or pull-down programming resistors.
LCOM is also in a high impedance state
when the display is off.
SEG
1
–
SEG
5
LED display segment outputs (dual func
-
tion with PROG
1
—PROG
5
)
Each output may activate an LED to sink
the current sourced from LCOM.
PROG
1
–
PROG
5
Programmed full count selection imputs
(dual function with SEG
1
—SEG
5
)
These three-level input pins define the pro
-
grammed full count (PFC) thresholds de
-
scribed in Table 2.
PROG
3
–
PROG
4
Gas gauge rate selection inputs (dual
function with SEG
3
—SEG
4
)
These three-level input pins define the pro-
grammed full count (PFC) thresholds de-
scribed in Table 2.
PROG
5
Self-discharge rate selection (dual func-
tion with SEG
5
)
This three-level input pin defines the self-
discharge compensation rate shown in Ta-
ble 1.
CHG
Charge control output
This open-drain output becomes active high
when charging is allowed.
DONE
Fast charge complete
This input is used to communicate the
status of an external charge controller such
as the bq2004 Fast Charge IC. Note: This
pin must be pulled down to V
SS
using a
200KΩ resistor.
SR
Sense resistor input
The voltage drop (V
SR
) across the sense re
-
sistor R
S
is monitored and integrated over
time to interpret charge and discharge activ
-
ity. The SR input is tied to the high side of
the sense resistor. V
SR
<V
SS
indicates dis
-
charge, and V
SR
>V
SS
indicates charge. The
effective voltage drop V
SRO
, as seen by the
bq2014, is V
SR
+V
OS
(see Table 5).
DISP
Display control input
DISP
high disables the LED display. DISP
tied to V
CC
allows PROG
X
to connect di
-
rectly to V
CC
or V
SS
instead of through a
pull-up or pull-down reistor. DISP
floating
allows the LED display to be active during
a valid charge or during discharge if the
NAC register is updated at a rate equiva
-
lent to V
SRO
≤ -4mV. DISP low activates
the display. See Table 1.
SB
Secondary battery input
This input monitors the single-cell voltage
potential through a high-impedance resis-
tive divider network for the end-of-discharge
voltage (EDV) thresholds,maximum charge
voltage (MCV), and battery removed.
EMPTY
Battery empty output
This open-drain output becomes high-
impedance on detection of a valid final end-
of-discharge voltage (V
EDVF
) and is low fol
-
lowing the next application of a valid charge.
DQ
Serial I/O pin
This is an open-drain bidirectional pin.
REF
Voltage reference output for regulator
REF provides a voltage reference output for
an optional micro-regulator.
V
CC
Supply voltage input
V
SS
Ground
2
bq2014