Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - battery management Charge indicator Li-Ion SOIC 16 N Surface-mount

Features

➤

Accurate measurement of avail

able capacity in Lithium Ion bat

teries

➤

Provides a low-cost battery man

agement solution for pack

integration

Complete circuit can fit in as

little as

square inch of PCB

Low operating current (120µA

typical)

Less than 100nA of data

retention current

➤

High-speed (5kb) single-wire

communication interface (HDQ

bus) for critical battery

parameters

➤ Monitors and controls charge FET

in Li-Ion pack protection circuit

➤ Direct drive of remaining capacity

LEDs

➤ Measurements automatically

compensated for rate and

temperature

➤ 16-pin narrow SOIC

General Description

The bq2050H Lithium Ion Power

Gauge™ IC is intended for battery-

pack or in-system installation to

maintain an accurate record of

available battery capacity. The IC

monitors a voltage drop across a

sense resistor connected in series

between the negative battery termi

nal and ground to determine

charge and discharge activity of

the battery. Compensations for bat

tery temperature, self discharge,

and rate of discharge are applied to

the charge counter to provide avail

able capacity information across a

wide range of operating conditions.

Battery capacity is automatically re

calibrated, or “learned,” in the

course of a discharge cycle from full

to empty.

Nominal available capacity may be

directly indicated using a five-

segment LED display. These seg-

ments are used to graphically indi

cate available capacity. The

bq2050H also supports a simple

single-line bidirectional serial link

to an external processor (common

ground). The 5kb HDQ bus interface

reduces communications overhead

in the external microcontroller.

Internal registers include available

capacity, temperature, scaled avail

able energy, battery ID, battery

status, and Li-Ion charge FET

status. The external processor may

also overwrite some of the bq2050H

power gauge data registers.

The bq2050H can operate from the

batteries in the pack. The REF out

put and an external transistor allow

a simple, inexpensive voltage regu-

lator to supply power to the circuit

from the cells.

bq2050H

LCOM LED common output

SEG

/PROG

LED segment 1/

program 1 input

SEG

/PROG

LED segment 2/

program 2 input

SEG

/PROG

LED segment 3/

program 3 input

SEG

/PROG

LED segment 4/

program 4 input

SEG

/PROG

LED segment 5/

program 5 input

CFC Charge FET control

output

PN2050H1.eps

16-Pin Narrow SOIC

REF

PSTAT

HDQ

RBI

DISP

LCOM

SEG

/PROG

SEG

/PROG

SEG

/PROG

SEG

/PROG

SEG

/PROG

CFC

System ground

SR Sense resistor input

DISP

Display control input

SB Battery sense input

RBI Register backup input

HDQ Serial communications

input/output

PSTAT Protector status input

REF Voltage reference output

Supply voltage

Pin Connections

SLUS150–MAY 1999 D

Low-Cost Lithium Ion Power Gauge™ IC

Pin Names

Summary of content (29 pages)

PAGE 1
bq2050H Low-Cost Lithium Ion Power Gauge™ IC Features General Description ➤ Accurate measurement of available capacity in Lithium Ion batteries The bq2050H Lithium Ion Power Gauge™ IC is intended for batterypack or in-system installation to maintain an accurate record of available battery capacity. The IC monitors a voltage drop across a sense resistor connected in series between the negative battery termina l a n d g r ou n d t o d e t e r m i n e charge and discharge activity of the battery.
PAGE 2
bq2050H Pin Descriptions DISP LCOM DISP high disables the LED display. DISP tied to VCC allows PROGX to connect directly to VCC or VSS instead of through a pull-up or pull-down resistor. DISP floating allows the LED display to be active during charge. DISP low activates the display. See Table 1. This open-drain output switches V CC to source current for the LEDs. The switch is off during initialization to allow reading of the soft pull-up or pull-down program resistors.
PAGE 3
bq2050H capacity. The scaled available energy measurement is corrected for environmental and operating conditions. Functional Description General Operation Figure 1 shows a typical battery pack application of the bq2050H using the LED display capability as a chargestate indicator. The bq2050H is configured to display capacity in relative display mode. The relative display mode uses the last measured discharge capacity of the battery as the battery “full” reference.
PAGE 4
bq2050H Voltage Thresholds TMP (hex) Temperature Range 0x < -30°C 1x -30°C to -20°C 2x -20°C to -10°C where N is the number of cells, RB1 is connected to the positive battery terminal, and RB2 is connected to the negative battery terminal. The single-cell battery voltage is monitored for the end-of-discharge voltage (EDV) thresholds. The EDV threshold levels are used to determine when the battery has reached an “empty” state.
PAGE 5
bq2050H The battery's initial capacity equals the Programmed Full Count (PFC) shown in Table 2. Until LMD is updated, NAC counts up to but not beyond this threshold during subsequent charges. This approach allows the gas gauge to be charger-independent and compatible with any type of charge regime. Gas Gauge Operation The operational overview diagram in Figure 2 illustrates the operation of the bq2050H.
PAGE 6
bq2050H 2. Programmed Full Count (PFC) or initial battery capacity: Example: Selecting a PFC Value Given: The initial LMD and gas gauge rate values are programmed by using PROG1–PROG4. The bq2050H is configured for a given application by selecting a PFC value from Table 2. The correct PFC may be determined by multiplying the rated battery capacity in mAh by the sense resistor value: Sense resistor = 0.
PAGE 7
bq2050H E(mWh) = (SAEH ∗ 256 + SAEL) ∗ Select: 1.2 ∗ SCALE ∗ (RB1 + RB2) RS ∗ RB2 PFC = 30720 counts or 48mVh PROG1 = float PROG2 = low PROG3 = high PROG4 = float PROG5 = float where RB1, RB2, and RS are resistor values in ohms, as shown in Figure 1. SCALE is the selected scale from Table 2. 6. Compensated Available Capacity (CACT) The initial full battery capacity is 48mVh (960mAh) until the bq2050H “learns” a new capacity with a qualified discharge from full to EDV1. 3.
PAGE 8
bq2050H Charge Compensation Table 3A. Graphite Anode Approximate Discharge Rate Available Capacity Reduction < 0.5C 0 ≥ 0.5C 0.05 ∗ LMD The bq2050H also monitors temperature during charge. If the temperature is <0°C, NAC will only increment up to 0.94 * LMD, inhibiting VDQ from being set. This keeps a “learn” cycle from occurring when the battery is charged at very low temperatures. If the temperature rises above 0°C, NAC will be allowed to count up to NAC = LMD.
PAGE 9
bq2050H Table 6. bq2050H Current-Sensing Errors Symbol Parameter Typical Maximum Units Notes INL Integrated non-linearity error ±2 ±4 % Add 0.1% per °C above or below 25°C and 1% per volt above or below 4.25V. INR Integrated nonrepeatability error ±1 ±2 % Measurement repeatability given similar operating conditions. trol FET signal and can quickly determine if the protector circuit is operating properly during charge.
PAGE 10
bq2050H should be held for a period, tDH;DV, to allow the host or bq2050H to sample the data bit. Table 7. VOS-Related Current Sense Error (Current = 1A) VOS (µV) 50 100 150 180 20 0.25 0.50 0.75 0.90 Sense Resistor 50 100 0.10 0.05 0.20 0.10 0.30 0.15 0.36 0.18 The final section is used to stop the transmission by returning the HDQ pin to a logic-high state by at least a period, tSSU;B, after the negative edge used to start communication.
PAGE 11
bq2050H Send Host to bq-HDQ Send Host to bq-HDQ or Receive from bq-HDQ Data CDMR R/W MSB Bit7 Address LSB Bit0 Break tRR tRSPS Start-bit Address-Bit/ Data-Bit Stop-Bit TD201807.eps Figure 4. bq2050H Communication Example Written by Host to bq2050H CMDR = 03h LSB MSB Break 1 1 0 0 0 0 0 0 Received by Host to bq2050H NACH = 65h LSB MSB 1 01 0 011 0 HDQ tRSPS TD2050H2.eps Figure 5.
PAGE 12
bq2050H Table 8. bq2050H Command and Status Registers Symbol FLGS1 TMP NACH NACL BATID LMD FLGS2 PPD PPU CPI VSB VTS CACT CACD SAEH SAEL RCAC VSRH VSRL NMCV DCR PPFC INTSS RST HEXFF Notes: Register Name Loc.
PAGE 13
bq2050H The PSTAT values are: Command Code Bits 7 - 6 5 4 AD6 AD5 3 AD4 2 AD3 1 AD2 FLGS1 Bits 0 AD1 AD0 (LSB) 7 6 5 4 3 2 1 0 - - PSTAT - - - - - Where PSTAT is: Primary Status Flags Register (FLGS1) The FLGS1 register (address = 01h) contains the primary bq2050H flags. 0 PSTAT input is low (PSTAT < 0.5V) 1 PSTAT input is high (PSTAT > 2.
PAGE 14
bq2050H The bq2050H calculates the gas gauge bits, GG3-GG0 as a function of CACT and LMD. The results of the calculation give available capacity in 1 16 increments from 0 to 15 16. The first end-of-discharge warning flag (EDV1) warns the user that the battery is almost empty. The first segment pin, SEG1, is modulated at a 4Hz rate if the display is enabled once EDV1 is asserted, which should warn the user that loss of battery power is imminent.
PAGE 15
bq2050H Where VQ is: Last Measured Discharge Register (LMD) LMD is the register (address=05h) that the bq2050H uses as a measured full reference. The bq2050H adjusts LMD based on the measured discharge capacity of the battery from full to empty. In this way the bq2050H updates the capacity of the battery. LMD is set to PFC during a bq2050H reset. If DCR < 0.94 LMD, then LMD is set to 0.94 ∗ LMD. Secondary Status Flags Register (FLGS2) Bit 7 and bit 1 of FLGS2 are reserved. Do not write to these bits.
PAGE 16
bq2050H The CPI register is incremented every time a valid charge is detected. When NAC > 0.94 * LMD, however, the CPI register increments on the first valid charge; CPI does not increment again for a valid charge until NAC < 0.94 * LMD. This prevents continuous trickle charging from incrementing CPI if self-discharge decrements NAC. The CPI register increments to 255 without rolling over. When the contents of CPI are incremented to 64, the capacity inaccurate flag, CI, is asserted in the FLGS1 register.
PAGE 17
bq2050H Maximum Cell Voltage Register (NMCV) After these operations, a software reset will occur. The NMCV register (address 15h) is used to set the maximum battery pack voltage for control of the CFC pin. If desired, the system can write a value to NMCV to enable CFC to go low if VSB exceeds this value. This may be useful as a secondary protection of the Li-Ion battery pack.
PAGE 18
bq2050H Absolute Maximum Ratings Symbol Parameter Minimum Maximum Unit Notes VCC Relative to VSS -0.3 +7.0 V All other pins Relative to VSS -0.3 +7.0 V REF Relative to VSS -0.3 +8.5 V Current limited by R1 (see Figure 1) VSR Relative to VSS -0.3 Vcc+0.7 V 100kΩ series resistor should be used to protect SR in case of a shorted battery. TOPR Operating temperature 0 +70 °C Commercial Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded.
PAGE 19
bq2050H DC Electrical Characteristics (TA = TOPR) Symbol Parameter VCC Supply voltage VOS Offset referred to VSR Minimum Typical Maximum Unit 3.0 4.25 6.5 V 5.7 4.5 2.0 0 10 -0.2 500 10 VCC - 0.2 float ±50 6.0 5.0 90 120 170 - ±150 6.3 7.5 135 180 250 VCC 5 0.2 100 VSS + 0.2 float µV V V MΩ µA µA µA V MΩ µA µA nA KΩ MΩ V V V Notes VCC excursion from < 2.0V to ≥ 3.0V initializes the unit. DISP = VCC IREF = 5µA IREF = 5µA VREF = 3V VCC = 3.0V, HDQ = 0 VCC = 4.25V, HDQ = 0 VCC = 6.
PAGE 20
bq2050H High-Speed Serial Communication Timing Specification (TA = TOPR) Parameter Minimum tCYCH Symbol Cycle time, host to bq2050H (write) 190 - - µs tCYCB Cycle time, bq2050H to host (read) 190 205 250 µs tSTRH Start hold, host to bq2050H (write) 5 - - ns tSTRB Start hold, bq2050H to host (read) 32 - - µs tDSU Data setup - - 50 µs tDSUB Data setup - - 50 µs tDH Data hold 90 - - µs tDV Data valid - - 80 µs tSSU Stop setup - - 145 µs tSSUB Stop setu
PAGE 21
bq2050H Break Timing tBR tB TD201803.
PAGE 22
bq2050H 16-Pin SOIC Narrow (SN) 16-Pin SN (0.150" SOIC) D e Inches B E H A C A1 .004 L 22 Millimeters Dimension Min. Max. Min. Max. A 0.060 0.070 1.52 1.78 A1 0.004 0.010 0.10 0.25 B 0.013 0.020 0.33 0.51 C 0.007 0.010 0.18 0.25 D 0.385 0.400 9.78 10.16 E 0.150 0.160 3.81 4.06 e 0.045 0.055 1.14 1.40 H 0.225 0.245 5.72 6.22 L 0.015 0.035 0.38 0.
PAGE 23
bq2050H Data Sheet Revision History ChangeNo. Page No. 1 All 2 8 Digital magnitude filter changed from 200µV to 250µV. 2 18 VSRQ changed from 200µV(min) to 250µV(min). 2 18 VSRD changed from -200µV(max) to -250µV(max). 3 3 Updated application diagram 3 12 Changed designation on appropriate locations from “R/W” to “R” 3 16 Clarified current scale register description 3 18 Changed VSRO max. from +2000mV to +500mV 3 19 Changed VOL max. from 0.5V to 0.3V 3 20 Changed tSSUB max.
PAGE 24
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete.
PAGE 25
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device BQ2050HSN-A508TR Package Package Pins Type Drawing SOIC D 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 10.3 2.1 8.0 W Pin1 (mm) Quadrant 16.
PAGE 26
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ2050HSN-A508TR SOIC D 16 2500 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.