Datasheet

not affect the NAC register. The temperature adjust
-
ments are detailed in the CACH and CACL register de
-
scriptions.
When DISP
is tied to V
CC
, the SEG
1–5
outputs are inac
-
tive. When DISP
is left floating, the display becomes ac
-
tive whenever the bq2050 detects a charge in progress
V
SRO
>V
SRQ
. When pulled low, the segment outputs be
-
come active for a period of four seconds,
±
0.5 seconds.
The segment outputs are modulated as two banks, with
segments 1, 3, and 5 alternating with segments 2 and 4.
The segment outputs are modulated at approximately
100Hz with each segment bank active for 30% of the pe
-
riod.
SEG
1
blinks at a 4Hz rate whenever V
SB
has been de
-
tected to be below V
EDV1
(EDV1 = 1), indicating a low-
battery condition. V
SB
below V
EDVF
(EDVF = 1) disables
the display output.
Microregulator
The bq2050 can operate directly from one cell. A micro
-
power source for the bq2050 can be inexpensively built
using the FET and an external resistor to accommodate
a greater number of cells; see Figure 1.
15
bq2050