Datasheet
bq24030, bq24031
bq24032A, bq24035, bq24038
SLUS618H –AUGUST 2004–REVISED OCTOBER 2009...............................................................................................................................................
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ELECTRICAL CHARACTERISTICS
over junction temperature range (0°C ≤ T
J
≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT BIAS CURRENTS
I
CC(SPLY)
Active supply current, VCC V
VCC
> V
VCC(min)
1 2 mA
V
(AC)
< V
(BAT)
, V
(USB)
< V
(BAT)
,
I
CC(SLP)
Sleep current (current into BAT pin) 2.6 V ≤ V
I(BAT)
≤ V
O(BAT-REG)
, 2 5
Excludes load on OUT pin
V
I(AC)
≤ 6 V, Total current into AC pin with chip disabled,
I
CC(AS-STDBY)
AC standby current 200
Excludes all loads, CE=LOW, after t
(CE-HOLDOFF)
delay
I
CC(USB-
Total current into USB pin with chip disabled, Excludes all μA
USB standby current 200
STDBY)
loads, CE=LOW, after t
(CE-HOLDOFF)
delay
Total current into BAT pin with AC and/or USB present
I
CC(BAT-
BAT standby current and chip disabled; Excludes all loads (OUT and LDO), 45 60
STDBY)
CE=LOW, after t
(CE-HOLDOFF)
delay, 0°C ≤ T
J
≤ 85°C
(1)
I
IB(BAT)
Charge done current, BAT Charge DONE, AC or USB supplying the load 1 5
HIGH AC CUTOFF MODE
V
I(AC)
> 6.8 V, AC FET (Q1) turns off, USB FET (Q3) turns
V
CUT-OFF
Input ac cutoff voltage, bq24035 on if USB power present, otherwise BAT FET (Q2) turns 6.1 6.4 6.8 V
on.
LDO OUTPUT
Active only if AC or USB is present,
V
O(LDO)
Output regulation voltage 3.3 V
V
I(OUT)
≥ V
O(LDO)
+ (I
O(LDO)
× R
DS(on)
)
Regulation accuracy
(2)
–5% 5%
I
O(LDO)
Output current 20 mA
R
DS(on)
On resistance OUT to LDO 50 Ω
C
(OUT)
(3)
Output capacitance 1 μF
OUT PIN-VOLTAGE REGULATION
(4)
bq24030/31 V
I(AC)
≥ 6 V+V
DO
6.0 6.3
Output
V
O(OUT-REG)
regulation bq24032A V
I(AC)
≥ 4.4 V+V
DO
4.4 4.5 V
voltage
bq24038 VBSEL = HIGH or VBSEL = LOW, V
I(AC)
> 4.4 V+V
DO
4.4 4.5
OUT PIN – DPPM REGULATION
V
(DPPM-SET)
DPPM set point
(5)
V
DPPM-SET
< V
OUT
2.6 5 V
I
(DPPM-SET)
DPPM current source AC or USB present 95 100 105 μA
SF DPPM scale factor V
(DPPM-REG)
= V
(DPPM-SET)
× SF 1.139 1.150 1.162
(1) This includes the quiescent current for the integrated LDO.
(2) In standby mode (CE low) the accuracy is ±10%.
(3) LDO output capacitor not required but one with a value of 0.1 μF is recommended.
(4) When power is applied to the USB pin and PSEL is low, the USB input is switched straight through to the OUT pin (not regulated). This
voltage may drop to the DPPM-OUT threshold or battery voltage (which ever is higher) if the USB input current limit is active.
(5) V
(DPPM-SET)
is scaled up by the scale factor for controlling the output voltage V
(DPPM-REG)
.
4 Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated
Product Folder Link(s): bq24030, bq24031 bq24032A, bq24035, bq24038










