Datasheet

bq24050

bq24052

bq24055

www.ti.com

SLUS940B –SEPTEMBER 2009–REVISED JUNE 2012

The D+ and D– pin connections inside the charger are disconnected within 100ms of the D+ or D– lines being

pulled high (start of detection), to minimize any interaction between the charger detection pins and the USB

normal communications. If the device transceiver is able to communicate with the USB host, communication

typically starts after 100ms after the device has pulled the D+ or D– line high indicating it is “on line”, and by then

the IC detection is complete and has been disconnected. The device host then may change the ISET2 level or

disable the IC by pulling the TS pin low.

Sleep Mode

If the IN pin voltage is between than V

OUT

and UVLO, the charge current is disabled, the safety timer

counting stops (not reset) and the PG and CHG pins are high impedance. As the input voltage rises and the

charger exits sleep mode, the PG pin goes low, the safety timer continues to count, charge is enabled and the

CHG pin returns to its previous state. See Figure 18

New Charge Cycle

A new charge cycle is started when a good power source is applied, performing a chip disable/enable (TS pin),

exiting Termination and Timer Disable Mode (TTDM), detecting a battery insertion or the OUT voltage dropping

below the VRCH threshold. The CHG pin is active low only during the first charge cycle, therefore exiting TTDM

or a dropping below VRCH will not turn on the CHG pin FET, if the CHG pin is already high impedance.