Datasheet

bq24050
bq24052
bq24055
SLUS940B –SEPTEMBER 2009–REVISED JUNE 2012 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION
The charger power stage and charge current sense functions are fully integrated. The charger function has high
accuracy current and voltage regulation loops, charge status display, and charge termination. The precharge
current and termination current threshold are programmed via an external resistor. The fast charge current value
is also programmable via an external resistor.
AVAILABLE OPTIONS
V
O(REG)
V
OVP
R
NTC
PG PACKAGE DEVICES MARKING
4.2 V 6.6 V 10 kΩ No 10 PIN 2 × 2mm
2
DFN bq24050 CVC
4.2 V 6.6 V 100 kΩ No 10 PIN 2 × 2mm
2
DFN bq24052 CGT
4.2 V 6.6 V 10 kΩ Yes 12 PIN 2 × 3mm
2
DFN bq24055 CGU
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
VALUE UNIT
IN (with respect to VSS) –0.3 to 30 V
OUT (with respect to VSS) –0.3 to 7 V
Input Voltage
PRE-TERM, ISET, ISET2, TS, CHG, PG, D+, D–, –0.3 to 7 V
(with respect to VSS)
Input Current IN 1.25 A
Output Current (Continuous) OUT 1.25 A
Output Sink Current CHG 15 mA
1µF between IN and GND,
Electrostatic discharge 1µF between TS and GND, 8 contact
ESD IN, OUT, TS kV
(IEC61000-4-2)
(2)
2µF between OUT and GND, 15 Air
x5R Ceramic or equivalent
T
J
Junction temperature –40 to 150 °C
T
STG
Storage temperature –65 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
(2) The test was performed on IC pins that may potentially be exposed to the customer at the product level. The bq2405x IC requires a
minimum of the listed capacitance, external to the IC, to pass the ESD test. The D+ D- lines require clamp diodes such as CM1213A-
02SR from CMD to protect the IC for this testing.
PACKAGE DISSIPATION RATINGS
(1) (2)
T
A
≤ 25°C DERATING FACTOR
PACKAGE R
θJA
R
θJC
POWER RATING T
A
> 25°C
2 × 2 mm
2
60°C/W 8.8°C/W 1.66W 16.6mW/°C
2 × 3 mm
2
58°C/W 5.3°C/W 1.72W 17.2mW/°C
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(2) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is
connected to the ground plane by a 2×3 via matrix
2 Copyright © 2009–2012, Texas Instruments Incorporated