Datasheet

1
2
3
4
5
10
9
8
7
6
IN
ISET
VSS
PRETERM
D+ D-
ISET2
CHG
TS
OUT
bq24050/2
1
2
3
4
5
12
11
10
9
8
IN
PRETERM
ISET
VSS
D+ D-
ISET2
CHG
TS
OUT
bq24055
6 7
PG NC
bq24050
bq24052
bq24055
SLUS940B –SEPTEMBER 2009–REVISED JUNE 2012 www.ti.com
PIN CONFIGURATION
PIN FUNCTIONS
NAME bq24050/2 bq24055 I/O DESCRIPTION
Input power, connected to external DC supply (AC adapter or USB port). Expected range
IN 1 1 I
of bypass capacitors 1μF to 10μF, connect from IN to V
SS
.
Battery Connection. System Load may be connected. Average load should not be
OUT 10 12 O excessive, allowing battery to charge within the 10 hour safety timer window. Expected
range of bypass capacitors 1μF to 10μF.
Programs the Current Termination Threshold (5 to 50% of Iout which is set by ISET) and
Sets the Pre-Charge Current to twice the Termination Current Level.
PRE-TERM 4 4 I
Expected range of programming resistor is 1k to 10kΩ (2k: I
OUT
/10 for term; I
OUT
/5 for
precharge)
Programs the Fast-charge current setting. External resistor from ISET to VSS defines fast
ISET 2 2 I
charge current value. Range is 10.8k (50mA) to 675 Ω (800mA).
Programming the Input/Output Current Limit for the USB or Adaptor source: High =
ISET2 7 9 I 500mAmax, Low = ISET, FLOAT = 100mA max. D+D– Detection initially sets the charge
threshold and requires ISET2 to change states to take control.
Temperature sense pin connected to ‘50/55 –10k at 25C NTC thermistor, ’52 – 100k NTC
at 25°C, in the battery pack. Floating TS Pin or pulling High puts part in TTDM and disable
TS monitoring, Timers and Termination. Pulling pin Low disables the IC ( CE function). If
TS 9
(1)
11 I
NTC sensing is not needed, connect this pin to VSS through an external ‘50/55-10kΩ /’52-
100kΩ resistor. A ‘50/55-250kΩ/’52-880kΩ from TS to ground will prevent IC entering
TTDM when battery with thermistor is removed.
VSS 3 3 – Ground terminal
Low (FET on) indicates charging and Open Drain (FET off) indicates no Charging or
CHG 8 10 O
Charge complete.
Low (FET on) indicates the input voltage is above UVLO and the OUT (battery) voltage
PG – 6 O
and less than V
OVP
D+ 5 5 I USB port D+ input connection
D– 6 8 I USB port D– input connection
NC – 7 NA Do not make connection to this pin (internal use) – Do not route through this pin
There is an internal electrical connection between the exposed thermal pad and the VSS
Thermal
Pad pin of the device. The thermal pad must be connected to the same potential as the VSS
PAD and Pad 2x2mm
2
–
2x3mm
2
pin on the printed circuit board. Do not use the thermal pad as the primary ground input
Package
for the device. VSS pin must be connected to ground at all times.
(1) Spins have different pin definitions
8 Copyright © 2009–2012, Texas Instruments Incorporated