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USING ADAPTERS WITH LARGE OUTPUT VOLTAGE RIPPLE

PCB LAYOUT CONSIDERATIONS

bq2406x

SLUS689A – JUNE 2006 – REVISED OCTOBER 2006

APPLICATION INFORMATION (continued)

• Whether other surfaces are in close proximity to the device being tested

The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal

PowerFET. It can be calculated from the following equation when a battery pack is being charged :

P = [V(IN) – V(OUT)] × I(OUT)

Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of

the charge cycle when the battery voltage is at its lowest. See the charging profile, Figure 13 .

If the board thermal design is not adequate the programmed fast charge rate current may not be achieved under

maximum input voltage and minimum battery voltage, as the thermal loop can be active effectively reducing the

charge current to avoid excessive IC junction temperature.

Some low cost adapters implement a half rectifier topology, which causes the adapter output voltage to fall

below the battery voltage during part of the cycle. To enable operation with low cost adapters under those

conditions the bq2406x family keeps the charger on for at least 30 msec (typical) after the input power puts the

part in sleep mode. This feature enables use of external low cost adapters using 50 Hz networks.

The backgate control circuit prevents any reverse current flowing from the battery to the adapter terminal during

the charger off delay time.

Note that the PG pin is not deglitched, and it indicates input power loss immediately after the input voltage falls

below the output voltage. If the input source frequently drops below the output voltage and recovers, a small

capacitor can be used from PG to VSS to prevent /PG flashing events.

It is important to pay special attention to the PCB layout. The following provides some guidelines:

• To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter

capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq2406x, with short

trace runs to both IN, OUT and GND (thermal pad).

• All low-current GND connections should be kept separate from the high-current charge or discharge paths

from the battery. Use a single-point ground technique incorporating both the small signal ground path and

the power ground path.

• The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the

maximum charge current in order to avoid voltage drops in these traces.

• The bq2406x family are packaged in a thermally enhanced MLP package. The package includes a thermal

pad to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal

pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground

connection. Full PCB design guidelines for this package are provided in the application note entitled:

QFN/SON PCB Attachment Application Note (SLUA271 ).

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