Datasheet

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ELECTRICAL CHARACTERISTICS
bq2406x
SLUS689A – JUNE 2006 – REVISED OCTOBER 2006
over recommended operating, T
J
= 0 –125 ° C range, See the Application Circuits section, typical values at T
J
= 25 ° C (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER DOWN THRESHOLD – UNDERVOLTAGE LOCKOUT
V(IN) = 0 V, increase V(OUT): 0 → 3 V OR
V
(UVLO)
Power down threshold V(OUT) = 0 V, increase V(IN): 0 → 3 V, 1.5 3.0 V
CE = LO
(1)
INPUT POWER DETECTION, CE = HI or LOW, V(IN) > 3.5 V
V
IN(DT)
Input power detection threshold V
(IN)
detected at [V(IN) – V(OUT)] > V
IN(DT)
130 mV
Input power not detected at
V
HYS(INDT)
Input power detection hysteresis 30 mV
[V
(IN)
– V
(OUT)]
< [V
IN(DT)
– V
HYS(INDT)
]
Deglitch time, input power detected PG:HI → LO, Thermal regulation loop not active,
T
DGL(INDT1)
1.5 3.5 ms
status R
TMR
= 50 K Ω or V
(TMR)
= OPEN
Delay time, input power not detected
T
DGL(NOIN)
PG: LO → HI after T
DGL(NOIN)
10 µ s
status
Charger turned off after T
DLY(CHGOFF)
, Measured
T
DLY(CHGOFF)
Charger off delay from PG: LO → HI; Timer reset after 28 32 ms
T
DLY(CHGOFF)
INPUT OVERVOLTAGE PROTECTION
bq24060/61/63 6.2 6.5 7.0
V
(OVP)
Input overvoltage detection threshold V(IN) increasing V
bq24064 10.2 10.5 11.7
bq24060/61/63 0.1 0.2
V
HYS(OVP)
Input overvoltage hysteresis V(IN) decreasing V
bq24064 0.3 0.5
CE = HI or LO, Measured from V(IN) > V
(OVP)
to
T
DGL(OVDET)
Input overvoltage detection delay 10 100 µ s
PG: LO → HI; VIN increasing
CE = HI or LO, Measured from V(IN) < V
(OVP)
T
DGL(OVNDET)
Input overvoltage not detected delay 10 100 µ s
to PG: HI → LO; V(IN) decreasing
QUIESCENT CURRENT
V
(IN)
= 6 V 100 200
Input power detected, CE =
I
CC(CHGOFF)
IN pin quiescent current, charger off µ A
HI
V
(IN)
= 16.5 V 300
I
CC(CHGON)
IN pin quiescent current, charger on Input power detected, CE = LO, V
BAT
= 4.5 V 4 6 mA
Battery leakage current after termination Input power detected, charge terminated,
I
BAT(DONE)
1 5 µ A
into IC CE = LO
Battery leakage current into IC, charger Input power detected, CE = HI OR
I
BAT(CHGOFF)
1 5 µ A
off input power not detected, CE = LO
TS PIN COMPARATOR
V
(TS1)
Lower voltage temperature threshold Hot detected at V(TS) < V
(TS1)
; NTC thermistor 29 30 31 %V(IN)
V
(TS2)
Upper voltage temperature threshold Cold detected at V(TS) > V
(TS2)
; NTC thermistor 60 61 62 %V(IN)
Temp OK at V(TS) > [ V
(TS1)
+ V
HYS(TS)
] OR
V
HYS(TS)
Hysteresis 2 %V(IN)
V
(TS)
< [ V
(TS2)
– V
HYS(TS)
]
CE INPUT
V
IL
Input (low) voltage V( CE) increasing 0 1 V
V
IH
Input (high) voltage V( CE) decreasing 2.0 V
STAT1, STAT2 AND PG OUTPUTS , V(IN) ≥ V
O(REG)
+ V
(DO-MAX)
V
OL
Output (low) saturation voltage Ioutput = 5 mA (sink) 0.5 V
THERMAL SHUTDOWN
T
(SHUT)
Temperature trip Junction temperature, temp rising 155 ° C
T
(SHUTHYS)
Thermal hysteresis Junction temperature 20 ° C
(1) Specified by design, not production tested.
3
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