Datasheet

bq24070
bq24071
www.ti.com SLUS694F –MARCH 2006–REVISED DECEMBER 2009
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0°C ≤ T
J
≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Voltage on ISET1, V
VCC
≥ 4.35 V,
Battery charge current set
V
(SET)
V
I(OUT)
- V
I(BAT)
> V
(DO-MAX)
, 2.47 2.50 2.53 V
voltage
(6)
V
I(BAT)
> V
(LOWV)
100 mA ≤ I
O(BAT)
≤ 1.5 A 375 425 450
K
(SET)
Charge current set factor, BAT
10 mA ≤ I
O(BAT)
≤ 100 mA
(7)
300 450 600
USB MODE INPUT CURRENT LIMIT
ISET2 = Low 80 90 100
I
(USB)
USB input port current range mA
ISET2 = High 400 500
BAT PIN CHARGING VOLTAGE REGULATION, V
O (BAT-REG)
+ V
(DO-MAX)
< V
CC
, I
TERM
< I
BAT(OUT)
≤ 1 A
Battery charge voltage 4.2 V
V
O(BAT-REG)
T
A
= 25°C –0.5% 0.5%
Battery charge voltage regulation
accuracy
–1% 1%
CHARGE TERMINATION DETECTION
Charge termination detection V
I(BAT)
> V
(RCH)
,
I
(TERM)
10 150 mA
range I
(TERM)
= (K
(SET)
× V
(TERM)
)/ R
SET
V
I(BAT)
> V
(RCH)
, Mode = High 230 250 270
Charge termination set voltage,
V
(TERM)
mV
measured on ISET1
V
I(BAT)
> V
(RCH)
, Mode = Low 95 100 130
t
FALL
= 100 ns, 10 mV overdrive,
De-glitch time for termination
T
DGL(TERM)
I
CHG
increasing above or decreasing below 22.5 ms
detection
threshold
TEMPERATURE SENSE COMPARATORS
V
LTF
High voltage threshold Temp fault at V(TS) > V
LTF
2.465 2.500 2.535 V
V
HTF
Low voltage threshold Temp fault at V(TS) < V
HTF
0.485 0.500 0.515 V
I
TS
Temperature sense current source 94 100 106 μA
R
(TMR)
= 50 kΩ, V
I(BAT)
increasing or
De-glitch time for temperature fault
T
DGL(TF)
decreasing above and below; 22.5 ms
detection
(8)
100-ns fall time, 10-mv overdrive
BATTERY RECHARGE THRESHOLD
V
O(BAT-
V
O(BAT-REG)
V
O(BAT-REG)
V
RCH
Recharge threshold voltage
REG)
V
–0.100 –0.125
–0.075
R
(TMR)
= 50 kΩ, V
I(BAT)
increasing
De-glitch time for recharge
T
DGL(RCH)
or decreasing below threshold, 22.5 ms
detection
(8)
100-ns fall time, 10-mv overdrive
STAT1, STAT2, AND PG, OPEN DRAIN (OD) OUTPUTS
(9)
I
OL
= 5 mA, An external pullup
V
OL
Low-level output saturation voltage 0.25 V
resistor ≥ 1 K required.
I
LKG
Input leakage current 1 5 μA
ISET2, CE INPUTS
V
IL
Low-level input voltage 0 0.4
V
V
IH
High-level input voltage 1.4
I
IL
Low-level input current, CE –1
I
IH
High-level input current, CE 1
μA
I
IL
Low-level input current, ISET2 V
ISET2
= 0.4 V –20
I
IH
High-level input current, ISET2 V
ISET2
= V
CC
40
t
(CE-HLDOFF)
Holdoff time, CE CE going low only 3.3 6.2 ms
(6) For half-charge rate, V
(SET)
is 1.25 V ± 25 mV.
(7) Specification is for monitoring charge current via the ISET1 pin during voltage regulation mode, not for a reduced fast-charge level.
(8) All de-glitch periods are a function of the timer setting and is modified in DPPM or thermal regulation modes by the percentages that the
program current is reduced.
(9) See Charger Sleep mode for PG (V
CC
= V
IN
) specifications.
Copyright © 2006–2009, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): bq24070 bq24071