Datasheet

V
IREG
+
1V
RSET1
1000,
bq24100, bq24103, bq24103A
bq24104, bq24105, bq24108, bq24109
bq24113, bq24113A, bq24115
www.ti.com SLUS606O –JUNE 2004–REVISED MARCH 2010
PACKAGE DISSIPATION RATINGS
T
A
< 40°C DERATING FACTOR
PACKAGE q
JA
q
JC
POWER RATING ABOVE T
A
= 40°C
RHL
(1)
46.87°C/W 2.5°C/W 1.81 W 0.021 W/°C
(1) This data is based on using the JEDEC High-K board, and the exposed die pad is connected to a copper pad on the board. This is
connected to the ground plane by a 2x3 via matrix.
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
Supply voltage, V
CC
and IN (Tie together) 4.35
(1)
16
(2)
V
Operating junction temperature range, T
J
–40 125 °C
(1) The IC continues to operate below V
min
, to 3.5 V, but the specifications are not tested and not specified.
(2) The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the IN or OUT pins. A tight layout
minimizes switching noise.
ELECTRICAL CHARACTERISTICS
T
J
= 0°C to 125°C and recommended supply voltage range (unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CURRENTS
V
CC
> V
CC(min)
, PWM switching 10
mA
I
(VCC)
V
CC
supply current V
CC
> V
CC(min)
, PWM NOT switching 5
V
CC
> V
CC(min)
, CE = HIGH 315 mA
0°C ≤ T
J
≤ 65°C, V
I(BAT)
= 4.2 V,
3.5
V
CC
< V
(SLP)
or V
CC
> V
(SLP)
but not in charge
Battery discharge sleep current, (SNS, 0°C ≤ T
J
≤ 65°C, V
I(BAT)
= 8.4 V,
I
(SLP)
5.5 mA
BAT, OUT, FB pins) V
CC
< V
(SLP)
or V
CC
> V
(SLP)
but not in charge
0°C ≤ T
J
≤ 65°C, V
I(BAT)
= 12.6 V,
7.7
V
CC
< V
(SLP)
or V
CC
> V
(SLP)
but not in charge
VOLTAGE REGULATION
CELLS = Low, in voltage regulation 4.2
Output voltage, bq24103/03A/04/13/13A
V
OREG
CELLS = High, in voltage regulation 8.4 V
Output voltage, bq24100/08/09 Operating in voltage regulation 4.2
Feedback regulation REF for bq24105/15
V
IBAT
I
IBAT
= 25 nA typical into pin 2.1 V
only (W/FB)
T
A
= 25°C –0.5% 0.5%
Voltage regulation accuracy
–1% 1%
CURRENT REGULATION - FAST CHARGE
V
LOWV
≤ V
I(BAT)
< V
OREG
,
I
OCHARGE
Output current range of converter 150 2000 mA
V
(VCC)
- V
I(BAT)
> V
(DO-MAX)
100 mV ≤ V
IREG
≤ 200 mV,
V
IREG
Voltage regulated across R
(SNS)
Accuracy –10% 10%
Programmed Where
5 kΩ ≤ RSET1 ≤ 10 kΩ, Select RSET1 to
program V
IREG
,
V
IREG(measured)
= I
OCHARGE
+ R
SNS
(–10% to 10% excludes errors due to RSET1
and R
(SNS)
tolerances)
V
(LOWV)
≤ V
I(BAT)
≤ V
O(REG)
,
V
(ISET1)
Output current set voltage 1 V
V
(VCC)
≤ V
I(BAT)
×
V(DO-MAX)
V
LOWV
≤ V
I(BAT)
< V
O(REG)
,
K
(ISET1)
Output current set factor 1000 V/A
V
(VCC)
≤ V
I(BAT)
+
V(DO-MAX)
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-charge transition voltage
V
LOWV
threshold, BAT, 68 71.4 75 %V
O(REG)
bq24100/03/03A/04/05/08/09 ICs only
Deglitch time for precharge to fast charge Rising voltage;
t 20 30 40 ms
transition, t
RISE
, t
FALL
= 100 ns, 2-mV overdrive
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