Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - battery management Charge management, Power management Li-Ion, Li-Po VQFN 24 (4x4)

SYS

BAT

DRV

PGND

BYP

SCL

SDA

BOOT

HOST

PMID

USB

System

Load

TEMP

PACK+

PACK-

VBUS

D+

D-

GND

STAT

INT

PSEL

USB PHY

bq24271

bq24270

bq24271

www.ti.com

SLUSB10 –JUNE 2012

1.5A, Singe Input, Single Cell Switchmode Li-Ion Battery Charger with Power Path

Management and I

C Interface

Check for Samples: bq24270, bq24271

FEATURES

• High-Efficiency Switch Mode Charger with

• Thermal Regulation Protection for Output

Separate Power Path Control Current Control

– Make a GSM Call with a Deeply Discharged • BAT Short-Circuit Protection

Battery or No Battery

• Soft-Start Feature to Reduce Inrush Current

– Instantly Start up the System from a Deeply

• Thermal Shutdown and Protection

Discharged Battery or No Battery

• Available in Small 2.8 mm x 2.8 mm 49-ball

• Highly Integrated Battery N-Channel MOSFET

WCSP or 4 mm x 4 mm QFN-24 Packages

Controller for Power Path Management

– 20 V input rating, with 6.5 V Overvoltage APPLICATIONS

Protection (OVP)

• Handheld Products

– Integrated FETs for Up to 1.5 A Charge

• Portable Media Players

Rate

• Portable Equipment

• Safe and Accurate Battery Management

• Netbook and Portable Internet Devices

Functions

– 0.5% Battery Regulation Accuracy

APPLICATION SCHEMATIC

– 10% Charge Current Accuracy

• Charge Parameters Programmed Using I

™Interface

– Charge Voltage, Current, Termination

Threshold, Input Current Limit, V

INDPM

Threshold

• Voltage-based, NTC Monitoring Input

– JEITA Compatible

DESCRIPTION

The bq24270 and bq24271 are highly integrated single cell Li-Ion battery charger and system power path

management devices targeted for space-limited, portable applications with high capacity batteries. The single cell

charger has several input current limits which allow operation from either a USB port or higher power input

supply (i.e. AC adapter or wireless charging input) for a versatile solution.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2NanoFree is a trademark of Texas Instruments.

C is a trademark of NXP B.V. Corporation.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (38 pages)

PAGE 1
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 1.
PAGE 2
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION (CONTINUED) The power path management feature allows the bq24270 and bq24271 to power the system from a high efficiency DC to DC converter while simultaneously and independently charging the battery.
PAGE 3
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) USB Pin voltage range (with respect to VSS) MIN MAX –2 20 V PMID, BYP, BOOT –0.3 20 V SW –0.7 12 V SDA, SCL, SYS, BAT, STAT, BGATE, DRV, TS, D+, D-, INT, PSEL, CD –0.3 7 V BOOT to SW –0.3 7 V 4.5 A SYS 3.5 A USB 1.
PAGE 4
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com ELECTRICAL CHARACTERISTICS Circuit of Figure 3, V(UVLO) < V(USB) < V(OVP) AND V(USB) > V(BAT)+V(SLP), TJ = 0°C–125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN V(UVLO) < V(USB) < V(OVP) AND V(USB) > V(BAT) + V(SLP) PWM switching I(USB) Supply current for control TYP 5 0°C < TJ < 85°C, High-Z Mode I(BAT) 0°C< TJ < 85°C, V(BAT) = 4.
PAGE 5
bq24270 bq24271 www.ti.
PAGE 6
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Circuit of Figure 3, V(UVLO) < V(USB) < V(OVP) AND V(USB) > V(BAT)+V(SLP), TJ = 0°C–125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 29.7 30 30.
PAGE 7
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 BLOCK DIAGRAM PMID BYP 5.2V Reference DRV USB 5A + BOOT CbC Current Limit USB IUSBLIM Q1 USB VINDPM DC-DC CONVERTER PWM LOGIC, COMPENSATION AND BATTERY FET CONTROL VSYS(REG) IBAT(REG) VBAT(REG) SW DIE Temp Regulation Q2 PGND SYS References Termination Reference + OVP Comparator + VUSB VUSBOVP Termination Comparator Q3 IBAT BAT Recharge Comparator VUSB VBAT+VSLP Start Recharge Cycle + VBATREG – 0.
PAGE 8
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com PIN CONFIGURATION Spacer 49-Ball 2.78 mm x 2.78 mm WCSP bq24270 (Top View) A B C D E 1 2 3 AGND AGND AGND BYP BYP SW PGND SW PGND PGND SYS D+ 4 BYP SW USB PMID SW PGND SYS USB USB SCL BGATE 1 2 3 4 5 6 7 A AGND AGND AGND AGND USB USB USB B BYP BYP BYP BYP PMIDU PMIDU PMIDU C SW SW SW SW SW SW SW D PGND PGND PGND PGND PGND PGND PGND E PGND PSEL N.C.
PAGE 9
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 PIN FUNCTIONS PIN NO. bq24270 PIN NAME PIN NO. bq24271 I/O DESCRIPTION YFF RGE YFF RGE AGND A1-A4 16, 21 A1-A4 16, 21 I Ground terminal. Connect to the thermal pad (for QFN only) and the ground plane of the circuit. USB A5-A7 22 A5-A7 22 I USB Input Power Supply. USB is connected to the external DC supply (AC adapter or USB port). Bypass USB to PGND with at least a 1 μF ceramic capacitor.
PAGE 10
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com PIN FUNCTIONS (continued) PIN NO. bq24270 PIN NAME YFF STAT PIN NO. bq24271 RGE G6 Thermal PAD — YFF 8 G6 Pad I/O DESCRIPTION O Status Output. STAT is an open-drain output that signals charging status and fault interrupts. STAT pulls low during charging. STAT is high impedance when charging is complete or the charger is disabled. When a fault occurs, a 128 μs pulse is sent out as an interrupt for the host.
PAGE 11
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 USB VBUS SW D+ PMIDU DGND 1uF System Load 0.01uF 4.7uF BOOT SYS BYP 10uF PGND 0.1uF AGND BGATE DRV BAT VDRV 1uF 1uF STAT PACK+ TS TEMP VSYS (1.8V) USB PHY PSEL PACK- bq24271 INT HOST GPIO1 SDA SDA SCL SCL Figure 2.
PAGE 12
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com DETAILED DESCRIPTION The bq24270 and bq24271 are highly integrated single cell Li-Ion battery chargers and system power path management devices targeted for space-limited, portable applications with high capacity batteries. The singleinput, single cell charger operates from either a USB port or alternate power source (i.e. wall adapter or wireless power input) for a versatile solution.
PAGE 13
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 Current Regulation Phase Precharge Phase Voltage Regulation Phase Regulation voltage Charge Current Regulation Threshold System Voltage VSYS (3.7 V) VBATSHRT (3 V) Battery Voltage Charge Current Termination Current Threshold IBATSHRT 50mA Precharge to Close Pack Protector Linear Charge to Maintain Minimum System Voltage Battery FET is OFF Battery FET is ON Figure 3.
PAGE 14
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com overall charging efficiency for long. If the die temperature does heat up, the thermal regulation circuit reduces the charge current to maintain a die temperature less than 125°C. If the current limit for the SYS output is reached (limited by the input current limit, or V(IN_DPM)), the SYS output drops to the V(MINSYS) output voltage.
PAGE 15
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 When the CE bit is a 0 and a valid source is connected to USB, the buck converter starts up and a charge cycle is initiated. When V(BAT) is high enough that V(SYS) is > VSYS(REG), the battery FET is turned on and the SYS output is connected to BAT. If the SYS voltage falls to VSYS(REG), it is regulated to that point to maintain the system output even with a deeply discharged or absent battery.
PAGE 16
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com Battery Discharge FET (BGATE) The bq24270 and bq24271 contain a MOSFET driver to drive an external discharge FET between the battery and the system output. This external FET provides a low impedance path when supplying the system from the battery. Connect BGATE to the gate of the external discharge MOSFET. BGATE is on under the following conditions: 1. No valid input supply connected. 2. 2.
PAGE 17
bq24270 bq24271 www.ti.
PAGE 18
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com D+ and D- Based Adapter Detection for the USB Input (D+ and D-, bq24270) The bq24270 contains a D+ and D– based adapter detection circuit that is used to program the input current limit for the USB input during DEFAULT mode. D+ and D– detection is only performed in DEFAULT mode unless forced by the D+ and D– EN bit in host mode. By default the USB input current limit is set to 100 mA.
PAGE 19
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 1.0C 0.5C Portion of spec not covered by TS Implementation on bq2427x 4.25V 4.15V 4.1V T1 (0ºC) T2 (10ºC) T3 (45ºC) T4 (50ºC) T5 (60ºC) Figure 6. Charge Current/Voltage During TS Conditions To satisfy the JEITA requirements, four temperature thresholds are monitored; the cold battery threshold (TNTC < 0°C), the cool battery threshold (0°C < TNTC < 10°C) the warm battery threshold (45°C < TNTC < 60°C) and the hot battery threshold (TNTC > 60°C). ).
PAGE 20
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com RLO × 0.564 × RHI RLO - RLO × 0.564 - RHI × 0.564 RLO × 0.383 × RHI RWARM = RLO - RLO × 0.383 - RHI × 0.383 RCOOL = DISABLE VBAT(REG) – 140mV 1 x Charge/ 0.5 x Charge TS COLD TS COOL TS WARM (3) (4) VDRV + + + VDRV TS HOT RHI + TS PACK+ TEMP bq2427x RLO PACK- Figure 7. TS Circuit If the TS function is not used, connect TS to DRV directly to disable the feature.
PAGE 21
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 Input Voltage Based DPM During normal charging process, if the input power source is not able to support the programmed or default charging current, the supply voltage deceases. Once the supply drops to VIN_DPM (default 4.2 V), the input current limit is reduced down to prevent further supply droop. When the IC enters this mode, the charge current is lower than the set value and the DPM_STATUS bit is set (Bit 5 in Register 05H).
PAGE 22
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com Charge Status Outputs (STAT, INT) The STAT output is used to indicate operation conditions for bq24270 and bq24271. STAT is pulled low during charging when EN_STAT bit in the control register (0x02h) is set to “1”. When charge is complete or disabled, STAT is high impedance. When a fault occurs, a 128-µs pulse (interrupt) is sent out to notify the host. The status of STAT during different operation conditions is summarized in Table 1.
PAGE 23
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 Figure 9. START and STOP Condition The master then generates the SCL pulses, and transmits the 8-bit address and the read/write direction bit R/W on the SDA line. During all transmissions, the master ensures that data is valid. A valid data condition requires the SDA line to be stable during the entire high period of the clock pulse (see Figure 10). All devices recognize the address sent by the master and compare it to their internal fixed addresses.
PAGE 24
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com Figure 12.
PAGE 25
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 Battery and Supply Status Register (READ/WRITE) Memory location: 01, Reset state: xxxx 0xxx BIT NAME Read/Write FUNCTION B7(MSB) NA Read Only NA B6 NA Read Only NA B5 USBSTAT1 Read Only B4 USBSTAT0 Read Only 00-Normal 01-Supply OVP 01-Weak Source Connected (No Charging) 11- VUSB < VUVLO B3 OTG_LOCK Read/Write B2 BATSTAT1 Read Only B1 BATSTAT0 Read Only B0 (LSB) EN_NOBATOP Read/ Write 0 – No OTG supply present.
PAGE 26
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com BIT NAME Read/Write FUNCTION B0 (LSB) HZ_MODE Read/Write 1-High impedance mode 0-Not high impedance mode (default 0) RESET Bit The RESET bit in the control register (0x02h) is used to reset all the charge parameters. Write “1” to RESET bit to reset all the registers to default values and place the bq24270 and bq24271 into DEFAULT mode and turn off the watchdog timer. The RESET bit is automatically cleared to zero once the devices enter DEFAULT mode.
PAGE 27
bq24270 bq24271 www.ti.
PAGE 28
bq24270 bq24271 SLUSB10 – JUNE 2012 www.ti.com LOW_CHG Bit (Low Charge Mode Enable) The LOW_CHG bit is used to reduce the charge current from the programmed value. This feature is used by systems where battery NTC is monitored by the host and requires a reduced charge current setting or by systems that need a “preconditioning” current for low battery voltages. Write a “1” to this bit to charge at half of the programmed charge current. Write a “0” to this bit to charge at the programmed charge current.
PAGE 29
bq24270 bq24271 www.ti.com SLUSB10 – JUNE 2012 The following provides some guidelines: • To obtain optimal performance, the power input capacitors, connected from the PMID input to PGND, must be placed as close as possible to the bq24270 and bq24271 • Place 4.7 µF input capacitor as close to PMID pin and PGND pin as possible to make high frequency current loop area as small as possible.
PAGE 30
PACKAGE OPTION ADDENDUM www.ti.
PAGE 31
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 32
PACKAGE MATERIALS INFORMATION www.ti.com 24-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device BQ24270RGER Package Package Pins Type Drawing VQFN RGE 24 BQ24270RGET VQFN RGE BQ24270YFFR DSBGA YFF BQ24270YFFT DSBGA BQ24271RGER SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 49 3000 180.0 8.4 2.93 2.93 0.
PAGE 33
PACKAGE MATERIALS INFORMATION www.ti.com 24-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ24270RGER VQFN RGE 24 3000 367.0 367.0 35.0 BQ24270RGET VQFN RGE 24 250 210.0 185.0 35.0 BQ24270YFFR DSBGA YFF 49 3000 182.0 182.0 17.0 BQ24270YFFT DSBGA YFF 49 250 182.0 182.0 17.0 BQ24271RGER VQFN RGE 24 3000 367.0 367.0 35.0 BQ24271RGET VQFN RGE 24 250 210.0 185.0 35.
PAGE 34
PAGE 35
PAGE 36
PAGE 37
PAGE 38
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.