Datasheet
bq24270
bq24271
SLUSB10 –JUNE 2012
www.ti.com
BIT NAME Read/Write FUNCTION
1-High impedance mode
B0 (LSB) HZ_MODE Read/Write
0-Not high impedance mode (default 0)
RESET Bit
The RESET bit in the control register (0x02h) is used to reset all the charge parameters. Write “1” to RESET bit
to reset all the registers to default values and place the bq24270 and bq24271 into DEFAULT mode and turn off
the watchdog timer. The RESET bit is automatically cleared to zero once the devices enter DEFAULT mode.
CE Bit (Charge Enable
The CE bit in the control register (0x02h) is used to disable or enable the charge process. A low logic level (0) on
this bit enables the charge and a high logic level (1) disables the charge. When charge is disabled, the SYS
output regulates to VSYS(REG) and battery is disconnected from the SYS. Supplement mode is still available if
the system load demands cannot be met by the supply. BGATE is high impedance when CE is high.
HZ_MODE Bit (High Impedance Mode Enable
The HZ_MODE bit in the control register (0x02h) is used to disable or enable the high impedance mode. A low
logic level (0) on this bit enables the IC and a high logic level (1) puts the IC in a low quiescent current state
called high impedance mode. When in high impedance mode, the converter is off and the battery FET and
BGATE are on. The load on SYS is supplied by the battery.
Control/Battery Voltage Register (READ/WRITE)
Memory location: 03, Reset state: 0001 0100
BIT NAME Read/Write FUNCTION
B7(MSB) VBREG5 Read/Write Battery Regulation Voltage: 640mV (default 0)
B6 VBREG4 Read/Write Battery Regulation Voltage: 320mV (default 0)
B5 VBREG3 Read/Write Battery Regulation Voltage: 160mV (default 0)
B4 VBREG2 Read/Write Battery Regulation Voltage: 80mV (default 1)
B3 VBREG1 Read/Write Battery Regulation Voltage: 40mV (default 0)
B2 VBREG0 Read/Write Battery Regulation Voltage: 20mV (default 1)
B1 NA Read/Write NA
0—Normal state, D+/D- Detection done
B0(LSB) D+/D-_EN Read/Write
1—Force D+/D- Detection. Returns to “0” after detection is done. (default 0)
Charge voltage range is 3.5 V—4.44 V with the offset of 3.5V and step of 20mV (default 3.6V).
Vender, Part, Revision Register (READ only)
Memory location: 04, Reset state: 0100 0000
BIT NAME Read/Write FUNCTION
B7(MSB) Vender2 Read only Vender Code: bit 2 (default 0)
B6 Vender1 Read only Vender Code: bit 1 (default 1)
B5 Vender0 Read only Vender Code: bit 0 (default 0)
B4 PN1 Read only For I
2
C Address 6Bh:
00: bq24270 and bq24271
B3 PN0 Read only
01 – 11: Future product spins
B2 Revision2 Read only 000: Revision 1.0
001:Revision 1.1
B1 Revision1 Read only
010: Revision 2.0
011:Revision 2.1
100:Revision 2.2
B0(LSB) Revision0 Read only
101: Revision 2.3
110-111: Future Revisions
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Product Folder Link(s): bq24270 bq24271