Datasheet
bq29330
SLUS673E –SEPTEMBER 2005–REVISED MARCH 2012
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CELL_SEL b2–b3 (CAL1, CAL0): These bits determine the mode of the voltage monitor block
CAL1 CAL0 SELECTED MODE
0 0 Cell translation for selected cell (default)
0 1 Offset measurement for selected cell
1 0 Monitor the VREF value for gain calibration
Monitor the V
REF
directly value for gain calibration,
1 1
bypassing the translation circuit
CELL_SEL b4–b7 (CB0 – CB3): These 4 bits select the series cell for cell balance bypass path.
CELL_SEL b4 (CB0): This bit enables or disables the bottom series cell balance charge bypass path.
0 = Disable bottom series cell balance charge bypass path (default)
1 = Enable bottom series cell balance charge bypass path
CELL_SEL b5 (CB1): This bit enables or disables the second lowest series cell balance charge bypass path.
0 = Disable series cell balance charge bypass path (default)
1 = Enable series cell balance charge bypass path
CELL_SEL b6 (CB2): This bit enables or disables the second highest cell balance charge bypass path.
0 = Disable series cell balance charge bypass path (default)
1 = Enable series cell balance charge bypass path
CELL_SEL b7 (CB3): This bit enables or disables the highest series cell balance charge bypass path.
0 = Disable series cell balance charge bypass path (default)
1 = Enable series cell balance charge bypass path
OLV: Overload Voltage threshold register
OLV REGISTER (0x05)
7 6 5 4 3 2 1 0
0 0 0 OLV4 OLV3 OLV2 OLV1 OLV0
OLV (b4–b0): These four bits select the value of the overload threshold with a default of 0000.
OLV (b5–b7): These bits are not used and should be set to 0.
OLV (b4–b0) configuration bits with corresponding voltage threshold
(1)
0x00 –0.050 V 0x08 –0.090 V 0x10 –0.130 V 0x18 –0.170 V
0x01 –0.055 V 0x09 –0.095 V 0x11 –0.135 V 0x19 –0.175 V
0x02 –0.060 V 0x0a –0.100 V 0x12 –0.140 V 0x1a –0.180 V
0x03 –0.065 V 0x0b –0.105 V 0x13 –0.145 V 0x1b –0.185 V
0x04 –0.070 V 0x0c –0.110 V 0x14 –0.150 V 0x1c –0.190 V
0x05 –0.075 V 0x0d –0.115 V 0x15 –0.155 V 0x1d –0.195 V
0x06 –0.080 V 0x0e –0.120 V 0x16 –0.160 V 0x1e –0.200 V
0x07 –0.085 V 0x0f –0.125 V 0x17 –0.165 V 0x1f –0.205 V
(1) If RSNS bit is FUNCTION_CONTROL = 1, then the corresponding voltage threshold is divided by 2.
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