Datasheet
GND
OVERCURRENT
CELL1..4
SRP
SRN
OVERLOAD
-
COMPARATOR
SHORT CIRCUIT
COMPARATOR
SHORT_CIRCUIT
DELAY
OPEN
DRAIN
OUTPUT
WATCHDOG
TIMER
GPOD
CELL VOLTAGE
TRANSLATION
POWER
MODE
CIRCUIT
DRIVE
CONTROL
CELL+
R
SNS
C
CELL
TOUT
R
THERM
C
THERM
THERMISTOR
CELL
SELECTION
SWITCHES
2.5-VLDO
POR
SHIP_ON
SLEEP_ON
VCCPACK
REG
C
REG
FET
LOGIC
NCHGATE
DRIVER
CHG_ON
DSG_ON
ZVCHG_ON
DSG
CHG
ZVCHG
PACK–
GGVDD
VC1
VC2
VC5
CELL 3
CELL 4
VC3
VC4
CELL 1
CELL 2
GGTS
INPUT
GG ANALOG
INPUT
WDI
32kHzINPUT
FROMGG
GGINTERFACE
SDATA
ALERTTOGG
OPENDRAIN
OUTPUT
GGINTERFACE
SCLK
SDATA
SCLK
XALERT
SERIAL INTERFACE
STATUS
OUTPUT CTL
STATECTL
FUNCTIONCTL
CELL SEL
OLV
OLD
SCC
SCD
REGISTERS
R
ZVCHG
GATEDRIVER
0.975V
BAT/25
PACK/25
RST
GGRST
PACK+
2nd
Protection
3.3-VLDO
LEDOUT
C
LED
GGLED
INPUT
BAT
CELL–
PMS
bq29330
SLUS673E –SEPTEMBER 2005–REVISED MARCH 2012
www.ti.com
PIN FUNCTIONS (continued)
PIN
DESCRIPTION
NAME DBT NO. RSM NO.
Digital input that provides the timing clock for the OC and SC delays and also acts as the watchdog
WDI 26 24
clock.
SCLK 28 25 Open-drain serial interface clock with internal 10-kΩ pullup to V
REG
SDATA 29 26 Open-drain bidirectional serial interface data with internal 10-kΩ pullup to V
REG
Open-drain output used to indicate status register changes. With internal 100-kΩ
XALERT 30 27
pullup to V
REG
2, 10, 12,
NC 15,18,27 Not electrically connected to the IC
14, 20
FUNCTIONAL BLOCK DIAGRAM
4 Submit Documentation Feedback Copyright © 2005–2012, Texas Instruments Incorporated
Product Folder Link(s): bq29330










