Datasheet
bq76PL102
SLUS887A – DECEMBER 2008 – REVISED OCTOBER 2009 ..........................................................................................................................................
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ELECTRICAL CHARACTERISTICS (continued)
T
A
= – 40 ° C to 85 ° C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
EXTERNAL TEMPERATURE SENSOR(S) TYPICAL CHARACTERISTICS
(6)
Measurement range
(7)
– 40 90 ° C
Resolution 0.2 ° C
25 ° C ± 2 ° C
Accuracy
(8)
0 ° C to 85 ° C ± 2 ° C
PowerPump ELECTRICAL CHARACTERISTICS (FOR bq76PL102)
(9)
V
OH
High drive, PUMP1S, PUMP2S I
OUT
= 10 µ A 0.9 V1 V
V
OL
Low drive, PUMP1S, PUMP2S I
OUT
= – 200 µ A 0.1 V1 V
V
OH
High drive, PUMP1N, PUMP2N I
OUT
= 200 µ A 0.9 V1 V
V
OL
Low drive, PUMP1N, PUMP2N I
OUT
= – 10 µ A 0.1 V1 V
I
OH
Source current, PUMP1S, PUMP2S V
OH
= V1 – 0.8 V 250 µ A
I
OL
Sink current, PUMP1N, PUMP2N V
OH
= V1 + 0.2 V – 250 µ A
t
r
Signal rise time C
Load
= 300 pF 100 ns
t
f
Signal FET fall time C
Load
= 300 pF 100 ns
f
P
Frequency 204.8 kHz
PUMP1S, PUMP2S 67%
PWM duty cycle
(10)
PUMP1N, PUMP2N 33%
LDO VOLTAGE CHARACTERISTICS
(11)
V
LDO
Single-cell operation, referenced to VSS Load = 200 µ A at 25 ° C, V1 = 2.8 V 2.425 2.5 2.575 V
V
LDO
Dual-cell operation, V1 = V2 = cell voltage Load = 2 mA at 25 ° C 2.425 2.5 2.575 V
V
LAN
SIGNALS
(12) (13) (14)
SDI, C coupling = 1000 pf 100
C
L
Load capacitance pF
SDO 100
V
IH
Input logic high SDI 0.8 V
LDO
V
V
OH
Output logic high SDO 0.9 V
LDO
V
V
IL
Input logic low SDI 0.2 V
LDO
V
V
OL
Output logic low SDO 0.1 V
LDO
V
t
r
Input rise time SDI 500 ns
t
f
Input fall time SDI 500 ns
t
or
Output rise time SDO 30 50 ns
t
of
Output fall time SDO 30 50 ns
(6) Typical for dual-diode (MMBD4148 or equivalent) external sensor using recommended circuit
(7) Range of diode sensors may exceed operation limits of IC and battery cells.
(8) Typical behavior after calibration; final result depends on specific component characteristics
(9) All parameters tested at typical cell voltages = 3.6 V.
(10) The frequency and duty cycle of each pump gate drive signal is set by the bq78PL114. The PUMPxN signals have a positive duty cycle
and switch on the N-Channel MOSFETs. The duty cycle of the PUMPxS signals is (100 – the duty cycle of the PUMPxN signals).
(11) After calibration
(12) Values specified by design
(13) The SDI and SDO pins on the bq76PL102 are ac-coupled from the cell circuits downstream and upstream, respectively. The limits
specified here are the voltage transitions which must occur within the SDI and SDO rise- and fall-time specifications.
(14) The value specified is over the full input voltage range and the maximum load capacitance.
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