Datasheet

bq76PL536A-Q1
www.ti.com SLUSAM3 –MAY 2011
CONFIG_COV REGISTER (0x42)
7 6 5 4 3 2 1 0
DISABLE – COV[5] COV[4] COV[3] COV[2] COV[1] COV[0]
The CONFIG_COV register determines cell overvoltage threshold voltage.
[7] (DISABLE): Disables the overvoltage function when set
0 = Overvoltage function enabled
1 = Overvoltage function disabled
[5..0] (COV[5]…[0]): Configuration bits with corresponding voltage threshold
0x00 = 2 V; each binary increment adds 50 mV until 0x3c = 5 V.
CONFIG_COVT REGISTER (0x43)
7 6 5 4 3 2 1 0
µs/ms – – COVD[4] COVD[3] COVD[2] COVD[1] COVD[0]
The CONFIG_COVT register determines cell overvoltage detection delay time.
[7] (µs/ms): Determines the units of the delay time, microseconds or milliseconds
0 = Microseconds
1 = Milliseconds
[4..0] COVD: 0x01 = 100; each binary increment adds 100 until 0x1f = 3100
Note: When this register is programmed to 0x00, the delay becomes 0s AND the COV state
is NOT latched in the COV_FAULT[] register. In this operating mode, the overvoltage
state for a cell is virtually instantaneous in the COV_FAULT[] register. This mode may
cause system firmware to miss a dangerous cell overvoltage condition.
CONFIG_UV REGISTER (0x44)
7 6 5 4 3 2 1 0
DISABLE – – CUV[4] CUV[3] CUV[2] CUV[1] CUV[0]
The CUV register determines cell under voltage threshold voltage.
[7] (DISABLE): Disables the undervoltage function when set
0 = Undervoltage function enabled
1 = Undervoltage function disabled
[5..0] (CUV[4]…[0]): Configuration bits with corresponding voltage threshold
0x00 = 0.7 V; each binary increment adds 100 mV until 0x1a = 3.3 V.
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