Datasheet

bq76PL536-Q1

www.ti.com

SLUSAB1 –MAY 2011

Automatic vs Manual Control

The ADC_CONTROL[ADC_ON] bit controls powering up the ADC section and the main bandgap reference. If

the bit is set to 1, the internal circuits are powered on, and current consumption by the part increases.

Conversions begin immediately on command. The host CPU should wait >500 µs before initiating the first

conversion after setting this bit.

If the ADC_ON bit is false, an additional 500 µs is required to stabilize the reference before conversions begin. In

this AUTOMATIC mode, power consumption is greatly reduced. Automatic mode is only available for the 3-µs

conversion timing. When the 6-, 12-, or 24-µs timing is selected, manual control of the ADC_ON bit must be used

to avoid locking up the internal state machine, which then requires a BROADCAST_RESET command be sent or

a POR to correct.

If the sampling interval (time between conversions) used is less than ~10 ms, manual mode should be selected

to avoid shifting the voltage reference, leading to inaccuracy in the measurements.

ADC Application Notes

Anti-Aliasing Filter

An anti-aliasing filter is required for each VCn input VC6–VC2, consisting of a 1-kΩ, 1% series resistor and

100-nF capacitor. The same filter is used, but with a 1-µF capacitor for the VC1 and VC0 sections. Good-quality

components should be used. A 1% resistor is recommended, because the resistor creates a small error by

forming a voltage divider with the input impedance of the part. The part is factory-trimmed to compensate for the

error introduced by the filter.

Using the 6-µs Conversion Setting

1. The conversion time is adjusted from 3 µs/channel to 6 µs/channel. This extends the total time to convert all

cell voltages from ≈21 µs (6 × 3 µs + 3 µs) to ≈ 42 µs (6 × 6 µs + 6 µs). To convert all cell voltages, plus the

brick voltage, plus the two temperature inputs requires ≈ 60 µs (9 × 6 µs + 6 µs).

2. The ADC_CTRL[ADC_ON] bit is set to 1 for conversions. The ADC_CTRL[] register is located at address

0x30.

The conversion time is controlled by the FUNCTION_CONFIG[] register at address 0x40. Two bits, ADCT0,

ADCT1 set the time.

FUNCTION_CONFIG REGISTER (0x40)

7 6 5 4 3 2 1 0

ADCT[1] ADCT[0] GPAI_REF GPAI_SRC CN[1] CN[0] - -

The FUNCTION_CONFIG sets the default configuration for special features of the device.

[7..6] (ADCT[0,1]): These bits set the conversion timing of the ADC measurement.

ADCT[1] ADCT[0] ~Conversion Time (μs)

0 0 3

0 1 6

1 0 12

1 1 24

A design issue in the device requires that any time the ADCT[1:0] bits are not equal to 0, the ADC_ON bit must

be set to 1 before initiating a conversion cycle. TI recommends setting the bit to 1 during battery operations when

conversions are to be made (it may be left on). The bit can be turned off when conversions are not active, i.e.,

during the key-off time. When the bit is turned on, the hardware enforces a 500-µs ±5% wait before conversions

are permitted. User firmware should wait the minimum ≈500 µs before requesting a conversion start after

ADC_ON = 1.