Datasheet

bq76PL536-Q1
www.ti.com
SLUSAB1 MAY 2011
FUNCTION_CONFIG REGISTER (0x40)
7 6 5 4 3 2 1 0
ADCT[1] ADCT[0] GPAI_REF GPAI_SRC CN[1] CN[0] 0
The FUNCTION_CONFIG sets the default configuration for special features of the device.
[7..6] (ADCT[0,1]): These bits set the conversion timing of the ADC measurement.
ADCT[1] ADCT[0] ~Conversion Time (μs)
0 0 3
0 1 6 (recommended)
1 0 12
1 1 24
[5] (GPAI_REF): This bit sets the reference for the GPAI ADC measurement.
0 = Internal ADC bandgap reference
1 = V
REG50
(ratiometric)
[4] (GPAI_SRC): This bit controls multiplexing of the GPAI register and determines whether the ADC mux
is connected to the external GPAI inputs, or internally to the BAT1 pin. The register
results are automatically scaled to match the input.
0 = External GPAI inputs are converted to result in GPAI register 0x0102.
1 = BAT pin to VSS voltage is measured and reported in the GPAI register.
[3..2] (CN[1..0]): These two bits configure the number of series cells used. If fewer than 6 cells are
configured, the corresponding OV/UV faults are ignored. For example, if the CN[x] bits
are set to 10b (2), then the OV/UV comparators are ignored for cells 5 and 6.
CN[1] CN[0] SERIES CELLS
0 0 6 (DEFAULT)
0 1 5
1 0 4
1 1 3
IO_CONFIG REGISTER (0x41)
7 6 5 4 3 2 1 0
CRC_DIS
The IO_CONFIG sets the default configuration for miscellaneous I/O features of the device.
[0] (CRC_DIS): This bit enables and disables the automatic generation of the CRC for the SPI
communication packet. The packet size is determined by the host as part of the read
request protocol. The CRC is checked at the deassertion of the CS pin. TI recommends
that this bit be changed using the broadcast address (0x3f) so that all devices in a battery
stack use the same protocol.
0 = A CRC is expected, and generated as the last byte of the packet.
1 = A CRC is not used in communications.
Copyright © 2011, Texas Instruments Incorporated 45