Datasheet
VC1
VC4
VC5
VDD
CD
1.2V(TYP)
R
IN
C
IN
R
VDD
C
VDD
LVIN
LVO
Level
shifter
Level
shifter
VC3
VC2
VC6
OUT
GND
x10
PACK+
PACK-
PCKN
NMOS
PCKP
I
CD
= 0.2 µA (TYP)
R
IN
C
IN
R
IN
C
IN
R
IN
C
IN
R
IN
C
IN
R
IN
C
IN
C
CD
Timer
Control
0.2 µA
(TYP)
bq77PL157A4225
www.ti.com
SLUSA00B –MARCH 2010–REVISED APRIL 2012
FUNCTIONAL BLOCK DIAGRAMS
Figure 1. bq77PL157 – Low-Side Power NMOS Direct-Drive Output
ABSOLUTE MAXIMUM RATINGS
over recommended operating free-air temperature range, (unless otherwise noted)
(1)
RANGE
VDD, PCKP –0.3 to 35 V
Supply voltage range, V
MAX
PCKN (VDD – 50) to VSS + 35 V
VCn (n=1 to 6) –0.3 to 35 V
Input voltage range, V
IN
VCn – VC(n+1), (n=1 to 5), VC6–GND –0.3 to 8 V
LVIN –0.3 to 35 V
OUT –0.3 to 35 V
Output voltage range, V
OUT
CD –0.3 to 35 V
LVO –0.3 to 35 V
Storage temperature range, T
stg
–65°C to 150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
Copyright © 2010–2012, Texas Instruments Incorporated 3










