Datasheet

Power Modes
Shutdown Mode
Exit From Shutdown
Parity Check
Communications
bq77PL900
SLUS844B – JUNE 2008 – REVISED JANUARY 2009 ...................................................................................................................................................... www.ti.com
The bq77PL900 has two power modes, normal and shutdown. Table 9 outlines the operational functions during
the two power modes.
Table 9. Power Modes
POWER TO ENTER MODE DESCRIPTION
MODE
NORMAL MODE
The battery is in normal operation with protection, power management, and battery monitoring
Normal functions available and operating. The supply current of this mode varies, as the host can enable and
disable various features.
Add supply at the When undervoltage is detected in stand-alone mode, or shutdown command at host-control mode, the
Shutdown
V
PACK
< V
WAKE
bq77PL900 goes into shutdown: all outputs and interfaces are OFF and memory is not valid.
In host-control mode, the bq77PL900 enters shutdown mode when it receives the shutdown command,
STATE_CONTROL [SHDN] set. First, the DSG FET is turned OFF, and then after the pack voltage goes to 0 V,
the bq77PL900 enters shutdown mode, which stops all functions of the bq77PL900.
In stand-alone mode the bq77PL900 enters shutdown when the battery voltage falls and UV is detected. It turns
the DSG FET OFF, and after the pack voltage goes to 0 V, the bq77PL900 enters shutdown mode, which stops
all functions.
If a voltage greater than V
STARTUP
is applied to the PACK pin, then the bq77PL900 exits from shutdown and
enters normal mode.
The bq77PL900 uses EEPROM for storage of protection thresholds, delay times, etc. The EEPROM is also used
to store internal trimming data. For safety reasons, the bq77PL900 uses a column parity error checking scheme.
If the column parity bit is changed from the written value, then OUT_CONTROL [PFALT] is set to 1 and XALERT
driven low. In stand-alone mode, both DSG and CHG outputs are driven high, turning OFF the DSG and CHG
FETs. The GPOD output is also turned off.
In host-control mode, only OUT_CONTROL [PFALT] and the XALERT output are changed, allowing the
microprocessor host to control bq77PL900 operation.
The I
2
C-like communication provides read and write access to the bq77PL900 data area. The data is clocked via
separate data (SDATA) and clock (SCLK) pins. The bq77PL900 acts as a slave device and does not generate
clock pulses. Communication to the bq77PL900 can be provided from the GPIO pins of a host controller. The
slave address for the bq77PL900 is 7 bits and the value is 0010 000.
(MSB) I
2
C Address + R/W Bit (LSB)
(MSB) I
2
C Address (LSB)
Write 0
0 0 1 0 0 0 0
Read 1
The bq77PL900 does NOT have the following functions compatible with the I
2
C specification.
• The bq77PL900 is always regarded as a slave.
• The bq77PL900 does not support the general code of the I
2
C specification and therefore does not return an
ACK, but may return a NACK.
• The bq77PL900 does not support the address auto-increment, which allows continuous reading and writing.
• The bq77PL900 allows data to be written to or read from the same location without resending the location
address.
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