Datasheet

OCD_CFG: Overcurrent in Discharge Configuration Register
bq77PL900
www.ti.com ...................................................................................................................................................... SLUS844B – JUNE 2008 – REVISED JANUARY 2009
OCD_CFG REGISTER (0x09)
7 6 5 4 3 2 1 0
CBEN ZVC SOR OCDD4 OCDD3 OCDD2 OCDD1 OCDD0
The FUNCTION & OCD_CFG register determines function and overload-detection delay time.
OCD_CFG b4 – b0 (OCDD4 – 0) configuration bits with corresponding delay time. Units are in ms and resolution is
20 ms or 100 ms.
0x00 20 ms 0x08 180 ms 0x10 100 ms 0x18 900 ms
0x01 40 ms 0x09 200 ms 0x11 200 ms 0x19 1000 ms
0x02 60 ms 0x0a 220 ms 0x12 300 ms 0x1a 1100 ms
0x03 80 ms 0x0b 240 ms 0x13 400 ms 0x1b 1200 ms
0x04 100 ms 0x0c 260 ms 0x14 500 ms 0x1c 1300 ms
0x05 120 ms 0x0d 280 ms 0x15 600 ms 0x1d 1400 ms
0x06 140 ms 0x0e 300 ms 0x16 700 ms 0x1e 1500 ms
0x07 160 ms 0x0f 320 ms 0x17 800 ms 0x1f 1600 ms
OCD_CFG b5 (SOR): Recover condition from SC and OC with stand-alone mode
0 = Recover by attaching a charger. Recover comparator is active after 12.8 s for OC/SC
detection (default).
1 = Recover by SC/OC condition released. Recovery from OC/SC after 12.8 s.
OCD_CFG b6 (ZVC): This bit controls the 0-V/precharge of the GPOD output.
0 = Disable the GPOD output 0-V/precharge mode with stand-alone (default).
1 = Enable the GPOD output 0-V/precharge mode with stand-alone.
OCD_CFG b7 (CBEN): This bit controls cell balancing.
0 = Disable the cell balancing function (default)
1 = Enable the cell balancing function.
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