Data Sheet
Table Of Contents
- 1 Module Overview
- Table of Contents
- 2 Revision History
- 3 Device Comparison
- 4 Terminal Configuration and Functions
- 5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 ESD Ratings
- 5.3 Recommended Operating Conditions
- 5.4 Current Consumption Summary: 2.4 GHz RF Band
- 5.5 Current Consumption Summary: 5 GHz RF Band
- 5.6 TX Power Control for 2.4 GHz Band
- 5.7 TX Power Control for 5 GHz Band
- 5.8 Brownout and Blackout Conditions
- 5.9 Electrical Characteristics for DIO Pins
- 5.10 WLAN Receiver Characteristics
- 5.11 WLAN Transmitter Characteristics
- 5.12 BLE and WLAN Coexistence Requirements
- 5.13 Reset Requirement
- 5.14 Thermal Resistance Characteristics for MOB Package
- 5.15 Timing and Switching Characteristics
- 5.16 External Interfaces
- 6 Detailed Description
- 7 Applications, Implementation, and Layout
- 8 Environmental Requirements and SMT Specifications
- 9 Device and Documentation Support
- 10 Mechanical, Packaging, and Orderable Information
- Important Notice
TI Confidential – NDA Restrictions
ADVANCEINFORMATION
23
CC3135MOD
www.ti.com
SWRS225A –FEBRUARY 2019–REVISED AUGUST 2019
Submit Documentation Feedback
Product Folder Links: CC3135MOD
SpecificationsCopyright © 2019, Texas Instruments Incorporated
Table 5-1 lists the brownout and blackout voltage levels.
Table 5-1. Brownout and Blackout Voltage Levels
CONDITION VOLTAGE LEVEL UNIT
V
brownout
2.1 V
V
blackout
1.67 V
(1) TI recommends using the lowest possible drive strength that is adequate for the applications. This recommendation minimizes the risk of
interference to the WLAN radio and reduces any potential degradation of RF sensitivity and performance. The default drive strength
setting is 6 mA.
(2) The nRESET pin must be held below 0.6 V for the device to register a reset.
5.9 Electrical Characteristics for DIO Pins
T
A
= 25°C, V
BAT
= 3.3 V
PARAMETER TEST CONDITIONS
(1)
MIN NOM MAX UNIT
C
IN
Pin capacitance 4 pF
V
IH
High-level input voltage 0.65 × V
DD
V
DD
+ 0.5 V V
V
IL
Low-level input voltage –0.5 0.35 × V
DD
V
I
IH
High-level input current 5 nA
I
IL
Low-level input current 5 nA
V
OH
High-level output voltage
IL = 2 mA; configured I/O drive
strength = 2 mA;
2.4 V ≤ V
DD
< 3.6 V
V
DD
× 0.8 V
IL = 4 mA; configured I/O drive
strength = 4 mA;
2.4 V ≤ V
DD
< 3.6 V
V
DD
× 0.7 V
IL = 8 mA; configured I/O drive
strength = 8 mA;
2.4 V ≤ V
DD
< 3.6 V
V
DD
× 0.7 V
IL = 2 mA; configured I/O drive
strength = 2 mA;
2.3 V ≤ V
DD
< 2.4 V
V
DD
× 0.75 V
V
OL
Low-level output voltage
IL = 2 mA; configured I/O drive
strength = 2 mA;
2.4 V ≤ V
DD
< 3.6 V
V
DD
× 0.2 V
IL = 4 mA; configured I/O drive
strength = 4 mA;
2.4 V ≤ V
DD
< 3.6 V
V
DD
× 0.2 V
IL = 8 mA; configured I/O drive
strength = 8 mA;
2.4 V ≤ V
DD
< 3.6 V
V
DD
× 0.2 V
IL = 2 mA; configured I/O drive
strength = 2 mA;
2.3 V ≤ V
DD
< 2.4 V
V
DD
× 0.25 V
I
OH
High-level
source current
2-mA drive 2
mA4-mA drive 4
6-mA drive 6
I
OL
Low-level sink
current
2-mA drive 2
mA4-mA drive 4
6-mA drive 6
V
IL
nRESET
(2)
0.6 V