Data Sheet
Table Of Contents
- 1 Module Overview
- Table of Contents
- 2 Revision History
- 3 Device Comparison
- 4 Terminal Configuration and Functions
- 5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 ESD Ratings
- 5.3 Recommended Operating Conditions
- 5.4 Current Consumption Summary: 2.4 GHz RF Band
- 5.5 Current Consumption Summary: 5 GHz RF Band
- 5.6 TX Power Control for 2.4 GHz Band
- 5.7 TX Power Control for 5 GHz Band
- 5.8 Brownout and Blackout Conditions
- 5.9 Electrical Characteristics for DIO Pins
- 5.10 WLAN Receiver Characteristics
- 5.11 WLAN Transmitter Characteristics
- 5.12 BLE and WLAN Coexistence Requirements
- 5.13 Reset Requirement
- 5.14 Thermal Resistance Characteristics for MOB Package
- 5.15 Timing and Switching Characteristics
- 5.16 External Interfaces
- 6 Detailed Description
- 7 Applications, Implementation, and Layout
- 8 Environmental Requirements and SMT Specifications
- 9 Device and Documentation Support
- 10 Mechanical, Packaging, and Orderable Information
- Important Notice
TI Confidential – NDA Restrictions
ADVANCEINFORMATION
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CC3135MOD
SWRS225A –FEBRUARY 2019–REVISED AUGUST 2019
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Detailed Description Copyright © 2019, Texas Instruments Incorporated
6.4 Low-Power Operating Modes
This section describes the low-power modes supported by the module to optimize battery life.
6.4.1 Low-Power Deep Sleep
The low-power deep-sleep (LPDS) mode is an energy-efficient and transparent sleep mode that is entered
automatically during periods of inactivity based on internal power optimization algorithms. The module can
wake up in less than 3 ms from the internal timer or from any incoming host command. Typical battery
drain in this mode is 135 µA. During LPDS mode, the module retains the software state and certain
configuration information. The operation is transparent to the external host; thus, no additional handshake
is required to enter or exit this sleep mode.
6.4.2 Hibernate
The hibernate mode is the lowest power mode in which all of the digital logic is power-gated. Only a small
section of the logic powered directly by the main input supply is retained. The real-time clock (RTC) is kept
running and the module wakes up when the n_HIB line is asserted by the host driver. The typical battery
drain in this mode is 5.5 µA. The wake-up time is longer than LPDS mode at about 50 ms.
6.4.3 Shutdown
Shutdown mode is the lowest power-mode system-wise. All device logics are off, including the realtime
clock (RTC). The typical battery drain in this mode is 1 µA. The wake-up time in this mode is longer than
hibernate at approximately 1.1 seconds.
6.5 Restoring Factory Default Configuration
The device has an internal recovery mechanism that allows rolling back the file system to its predefined
factory image or restoring the factory default parameters of the device. The factory image is kept in a
separate sector on the sFLASH in a secure manner and cannot be accessed from the host processor. The
following restore modes are supported:
• None—no factory restore settings
• Enable restore of factory default parameters
• Enable restore of factory image and factory default parameters
The restore process is performed by pulling or forcing SOP[2:0] = 011 pins and toggling the nRESET pin
from low to high.
The process is fail-safe and resumes operation if a power failure occurs before the restore is finished. The
restore process typically takes about 8 seconds, depending on the attributes of the serial Flash vendor.