User's Guide
Table Of Contents
- CC3235MODSF SimpleLink™ Wi-Fi® and IoT Solution With MCU LaunchPad™ Hardware
- Table of Contents
- 1 Introduction
- 2 Hardware
- 2.1 Block Diagram
- 2.2 Hardware Features
- 2.2.1 Key Benefits
- 2.2.2 XDS110-Based Onboard Debug Probe
- 2.2.3 Debug Probe Connection: Isolation Jumper Block
- 2.2.4 Application (or "Backchannel") UART
- 2.2.5 JTAG Headers
- 2.2.6 Using the XDS110 Debug Probe with a Different Target
- 2.2.7 Power Connections
- 2.2.8 Reset Pullup Jumper
- 2.2.9 Clocking
- 2.2.10 I2C Connection
- 2.2.11 Sense on Power (SOP)
- 2.2.12 Push-Buttons and LED Indicators
- 2.3 Electrical Characteristics
- 2.4 Antenna Characteristics
- 2.5 BoosterPack™ Header Pin Assignment
- 3 Layout Guidelines
- 4 Operational Setup and Testing
- 5 Development Environment Requirements
- 6 Additional Resources
- 7 Assembly Drawing and Schematics
- Revision History
- Important Notice
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0
R105
DNP
0
R104
3
1
2
Q2
FDN358P
DNP
TP2
GND GND
GND
VCC_MCU_5V VBAT_CC
+3.3V
1
Analog_In
2
LP_UART_RX
3
LP_UART_TX
4
GPIO !
5
Analog In
6
SPI_CLK
7
GPIO !
8
I2C_SCL
9
I2C_SDA
10
+5V
21
GND
22
Analog_In
23
Analog_In
24
Analog_In
25
Analog_In
26
Analog_In/I2S_WS
27
Analog_In/I2S_SCLK
28
Analog_Out/I2S_SDout
29
Analog_Out/I2S_SDin
30
P1
VCC_MCU_5V
GND
GPIO !
31
GPIO !
32
GPIO !
33
GPIO !
34
Timer_Cap/GPIO !
35
Timer_Cap/GPIO !
36
PWM/GPIO !
37
PWM/GPIO !
38
PWM/GPIO !
39
PWM/GPIO !
40
GPIO !
11
SPI_CS/GPIO !
12
SPI_CS/GPIO !
13
SPI_MISO
14
SPI_MOSI
15
RST
16
GPIO
17
GPIO !
18
PWM/GPIO !
19
GND
20
P2
GND
0
R57
DNP
0
R58
VBAT_CC
VCC_BRD
0R61
DNP
0R64 0R65
0R68 0R69
0R71 0R72
0R74
DNP
0R75
0R78 0R79
0R82 0R83
0R86 0R87
0R90 0R91
0R97
DNP
0R100
DNP
ANA_IN1
ANA_IN4
ANA_IN2
ANA_IN3
P63_GPIO_08
P53_GPIO_30
P64_GPIO_09
P50_GPIO_00
ANA_IN2
P04_GPIO_13
P03_GPIO_12
P61_GPIO_06
ANA_IN3
P05_GPIO_14
P62_GPIO_07
P01_GPIO_10
P02_GPIO_11
P16_GPIO_23
P17_GPIO_24
Alternate I2C
0R60
DNP
0R62
DNP
0R63
0R66
DNP
0R67
0R70
DNP
0R73
DNP
0R76
DNP
0R77
0R80
DNP
0R81
0R84
DNP
0R85
0R88 0R89
0R92 0R93
0R53
0R54
0R95
DNP
0R98
DNP
0R101
DNP
Alternate RTS
Alternate CTS
For Antenna diversity
0R96
DNP
0R99
DNP
SWAP MOSI/MISO
0R94
DNP
P60_GPIO_05
0R102
DNP
0R103
DNP
P03_GPIO_12
P04_GPIO_13
P58_GPIO_03 & P50_GPIO_00
can also be used for ANTSEL
COEX_SW_OUT &
CC_COEX_BLE_IN routed to
ANTSEL on Diversity Board
100k
R55
100k
R56
GNDGND
P58_GPIO_03
P50_GPIO_00
P17_GPIO_24
P64_GPIO_09
P21_GPIO_25
P18_GPIO_28
P62_GPIO_07
P60_GPIO_05
P16_GPIO_23
P17_GPIO_24
P02_GPIO_11
P01_GPIO_10
P62_GPIO_07
P50_GPIO_00
P61_GPIO_06
0R59
DNP
P59_GPIO_04
LP_RESET_OUT
P07_GPIO_16
P06_GPIO_15
P21_GPIO_25
P08_GPIO_17
LP_GPIO_01
P18_GPIO_28
P15_GPIO_22
P06_GPIO_15
P07_GPIO_16
P59_GPIO_04 / DIO 12 on CC2640R2LP
(COEX_WAKEUP)
J21
VCC_BRD VCC_OPAMP
ADC DRIVER
ANA_IN1
GND
LP_GPIO_02
0.01uF
C41
VCC_OPAMP
576k
R110
422k
R113
GND
1
2
3
4
11
OPA4342EA/250
U9A
5
6
7
4
11
OPA4342EA/250
U9B
8
9
10
4
11
OPA4342EA/250
U9C
12
13
14
4
11
OPA4342EA/250
U9D
0R106
DNP
470
R111
0.01uF
C43
ANA_IN2
VCC_OPAMP
576k
R119
422k
R123
GND
0
R115
DNP
470
R120
0.01uF
C45
P58_GPIO_03
ANA_IN4
VCC_OPAMP
576k
R108
422k
R112
0
R107
DNP
470
R109
0.01uF
C42
ANA_IN3
VCC_OPAMP
576k
R116
422k
R122
0
R114
DNP
470
R117
0.01uF
C44
P60_GPIO_05
P59_GPIO_04
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
J22
GND
BOOSTER PACK INTERFACE
0
R121
DNP
0
R118
1
2
3
J19
1
2
3
J20
CC_COEX_SW_OUT
CC_COEX_BLE
CC_COEX_WAKEUP
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Assembly Drawing and Schematics
47
SWRU548A–February 2019
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CC3235MODSF LaunchPad™ Development Kit (LAUNCHCC3235MOD)
Figure 33. Schematics (5 of 5)