Datasheet

MOTOROLA CMOS LOGIC DATA
1
MC14093B
The MC14093B Schmitt trigger is constructed with MOS P–channel and
N–channel enhancement mode devices in a single monolithic structure.
These devices find primary use where low power dissipation and/or high
noise immunity is desired. The MC14093B may be used in place of the
MC14011B quad 2–input NAND gate for enhanced noise immunity or to
“square up” slowly changing waveforms.
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
• Triple Diode Protection on All Inputs
• Pin–for–Pin Compatible with CD4093
• Can be Used to Replace MC14011B
• Independent Schmitt–Trigger at each Input
MAXIMUM RATINGS* (Voltages Referenced to V
SS
)
Symbol Parameter Value Unit
V
DD
DC Supply Voltage – 0.5 to + 18.0 V
V
in
, V
out
Input or Output Voltage (DC or Transient) – 0.5 to V
DD
+ 0.5 V
I
in
, I
out
Input or Output Current (DC or Transient),
per Pin
± 10 mA
P
D
Power Dissipation, per Package† 500 mW
T
stg
Storage Temperature – 65 to + 150
C
T
L
Lead Temperature (8–Second Soldering) 260
C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
EQUIVALENT CIRCUIT SCHEMATIC
(1/4 OF CIRCUIT SHOWN)
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
in
and
V
out
should be constrained to the range V
SS
≤ (V
in
or V
out
) ≤ V
DD
.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either V
SS
or V
DD
). Unused outputs must be left open.
SEMICONDUCTOR TECHNICAL DATA
 Motorola, Inc. 1995
REV 3
1/94
L SUFFIX
CERAMIC
CASE 632
ORDERING INFORMATION
MC14XXXBCP Plastic
MC14XXXBCL Ceramic
MC14XXXBD SOIC
T
A
= – 55° to 125°C for all packages.
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
LOGIC DIAGRAM
13
11
V
DD
= PIN 14
V
SS
= PIN 7
10
4
3
12
9
8
6
5
2
1