Datasheet

CD54AC00, CD74AC00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCHS303C – JANUARY 2001 – REVISED JUNE 2002
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AC Types Feature 1.5-V to 5.5-V Operation
and Balanced Noise Immunity at 30% of the
Supply Voltage
Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
Balanced Propagation Delays
±24-mA Output Drive Current
– Fanout to 15 F Devices
SCR-Latchup-Resistant CMOS Process and
Circuit Design
Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
description
The ‘AC00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function
of Y = A
B or Y = A + B in positive logic.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – E Tube CD74AC00E CD74AC00E
55°Cto125°C
SOIC M
Tube CD74AC00M
AC00M
–
55°C
to
125°C
SOIC
–
M
Tape and reel CD74AC00M96
AC00M
CDIP – F Tube CD54AC00F3A CD54AC00F3A
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB
design guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A B
Y
H H L
L XH
X L H
logic diagram, each gate (positive logic)
A
B
Y
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
CD54AC00 ...F PACKAGE
CD74AC00 ...E OR M PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.