Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Inverter Inverter 74AC PDIP 14

CD54AC05, CD74AC05

HEX INVERTERS

WITH OPEN-DRAIN OUTPUTS

SCHS306C – JANUARY 2001 –REVISED JUNE 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

AC Types Feature 1.5-V to 5.5-V Operation

and Balanced Noise Immunity at 30% of the

Supply Voltage

Speed of Bipolar F, AS, and S, With

Significantly Reduced Power Consumption

Balanced Propagation Delays

±24-mA Output Drive Current

– Fanout to 15 F Devices

SCR-Latchup-Resistant CMOS Process and

Circuit Design

Exceeds 2-kV ESD Protection Per

MIL-STD-883, Method 3015

description

The ’AC05 devices contain six independent inverters. These devices perform the Boolean function Y = A. The

open-drain outputs require pullup resistors to perform correctly, and can be connected to other open-drain

outputs to implement active-low wired-OR or active-high wired-AND functions.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – E Tube CD74AC05E CD74AC05E

55°Cto125°C

SOIC M

Tube CD74AC05M

AC05M

–

55°C

125°C

SOIC

–

Tape and reel CD74AC05M96

AC05M

CDIP – F Tube CD54AC05F3A CD54AC05F3A

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB

design guidelines are available at www.ti.com/sc/package.

FUNCTION TABLE

(each inverter)

INPUT

OUTPUT

H L

L Z

logic diagram, each inverter (positive logic)

GND

CD54AC05 ...F PACKAGE

CD74AC05 ...E OR M PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (13 pages)

PAGE 1
CD54AC05, CD74AC05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS SCHS306C – JANUARY 2001 –REVISED JUNE 2002 D D D D D D CD54AC05 . . . F PACKAGE CD74AC05 . . . E OR M PACKAGE (TOP VIEW) AC Types Feature 1.5-V to 5.
PAGE 2
CD54AC05, CD74AC05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS SCHS306C – JANUARY 2001 –REVISED JUNE 2002 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
CD54AC05, CD74AC05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS SCHS306C – JANUARY 2001 –REVISED JUNE 2002 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOL = 50 µA VOL II ICC VI = VIH or VIL VI = VCC or GND VI = VCC or GND, VCC TA = 25°C –40°C TO 85°C –55°C TO 125°C MIN MIN MIN MAX MAX 1.5 V 0.1 0.1 0.1 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 0.5 IOL = 12 mA IOL = 24 mA IOL = 50 mA† 3V 0.36 0.44 4.
PAGE 4
CD54AC05, CD74AC05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS SCHS306C – JANUARY 2001 –REVISED JUNE 2002 PARAMETER MEASUREMENT INFORMATION From Output Under Test CL = 50 pF (see Note A) R1 = 500 Ω† S1 2 × VCC VCC 50% VCC Input 50% VCC 0V R2 = 500 Ω† tPZL 50% VCC Output † When VCC = 1.5 V, R1 = R2 = 1 kΩ LOAD CIRCUIT tPLZ ≈VCC 20% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B.
PAGE 5
PACKAGE OPTION ADDENDUM www.ti.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 7
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device CD74AC05M96 Package Package Pins Type Drawing SOIC D 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 9.0 2.1 8.0 W Pin1 (mm) Quadrant 16.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CD74AC05M96 SOIC D 14 2500 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.