Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Demultiplexer, decoder Decoder/demultiplexer Single supply PDIP 16

CD54AC138, CD74AC138

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

AC Types Feature 1.5-V to 5.5-V Operation

and Balanced Noise Immunity at 30% of the

Supply Voltage

Speed of Bipolar F, AS, and S, With

Significantly Reduced Power Consumption

Designed Specifically for High-Speed

Memory Decoders and Data-Transmission

Systems

Incorporate Three Enable Inputs to Simplify

Cascading and/or Data Reception

Balanced Propagation Delays

±24-mA Output Drive Current

– Fanout to 15 F Devices

SCR-Latchup-Resistant CMOS Process and

Circuit Design

Exceeds 2-kV ESD Protection Per

MIL-STD-883, Method 3015

description/ordering information

The ’AC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing

applications that require very short propagation-delay times. In high-performance memory systems, these

decoders can be used to minimize the effects of system decoding. When employed with high-speed memories

utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are

less than the typical access time of the memory. This means that the effective system delay introduced by the

decoders is negligible.

The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two

active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.

A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one

inverter. An enable input can be used as a data input for demultiplexing applications (see Application

Information).

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – E Tube CD74AC138E CD74AC138E

55°Cto125°C

SOIC M

Tube CD74AC138M

AC138M

–

55°C

125°C

SOIC

–

Tape and reel CD74AC138M96

AC138M

CDIP – F Tube CD54AC138F3A CD54AC138F3A

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND

CD54AC138 ...F PACKAGE

CD74AC138 ...E OR M PACKAGE

(TOP VIEW)

Summary of content (17 pages)

PAGE 1
CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 D D D D D D D D CD54AC138 . . . F PACKAGE CD74AC138 . . . E OR M PACKAGE (TOP VIEW) AC Types Feature 1.5-V to 5.
PAGE 2
CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 FUNCTION TABLE SELECT INPUTS ENABLE INPUTS G1 G2A G2B C B X X H X X X X H X X A OUTPUTS Y0 Y1 Y2 Y3 Y4 Y5 Y6 X H H H H H H H H X H H H H H H H H L X X X X X H H H H H H H H H L L L L L L H H H H H H H H L L L L H H L H H H H H H H L L L H L H H L H H H H H H L L L H H H H H L H H H H H L
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CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V Input clamp current, IIK (VI < 0 V or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN IOH = –50 µA VOH VI = VIH or VIL IOH = –4 mA IOH = –24 mA IOH = –50 mA† IOH = –75 mA† IOL = 50 µA VOL II ICC VI = VIH or VIL VI = VCC or GND VI = VCC or GND, –55°C to 125°C TA = 25°C MAX MIN –40°C to 85°C MAX MIN 1.5 V 1.4 1.4 1.4 2.9 3V 2.
PAGE 5
CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, CL = 50 pF (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B A, B, C Any Y tPLH tPHL G1 Any Y tPLH tPHL G2A G2B G2A, Any Y PARAMETER –55°C to 125°C –40°C to 85°C UNIT MIN MAX MIN MAX 3.9 15.4 4 14 3.9 15.4 4 14 3.9 15.4 4 14 3.9 15.
PAGE 6
CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 PARAMETER MEASUREMENT INFORMATION S1 R1 = 500 Ω† From Output Under Test 2 × VCC Open GND CL = 50 pF (see Note A) R2 = 500 Ω† TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND tw VCC † When VCC = 1.
PAGE 7
CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 APPLICATION INFORMATION CD74AC138 BIN/OCT 1 2 3 VCC 0 1 1 2 2 4 6 3 & 4 4 EN 5 5 6 7 15 14 13 12 11 10 9 7 0 1 2 3 4 5 6 7 CD74AC138 BIN/OCT 1 A0 2 A1 3 A2 1 2 2 4 6 A3 0 1 3 & 4 4 A4 EN 5 5 6 7 15 14 13 12 11 10 9 7 8 9 10 11 12 13 14 15 CD74AC138 BIN/OCT 1 2 3 6 0 1 1 2 2 4 3 & 4 4 5 EN 5 6 7 15 14 13 12 11 10 9 7 16 17 18 19 20 21 22 23 Figure 2.
PAGE 8
CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 APPLICATION INFORMATION CD74AC138 BIN/OCT 1 A0 2 A1 3 A2 1 1 2 2 4 6 VCC 0 3 & 4 4 A3 EN 5 A4 5 6 7 15 14 13 12 11 10 9 7 0 1 2 3 4 5 6 7 CD74AC138 BIN/OCT 1 2 3 0 1 1 2 2 4 6 3 & 4 4 EN 5 5 6 7 15 14 13 12 11 10 9 7 8 9 10 11 12 13 14 15 CD74AC138 BIN/OCT 1 2 3 0 1 1 2 2 4 6 3 & 4 4 EN 5 5 6 7 15 14 13 12 11 10 9 7 16 17 18 19 20 21 22 23 CD74AC13
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant CD74AC138M96 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 CD74AC138M96 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CD74AC138M96 SOIC D 16 2500 367.0 367.0 38.0 CD74AC138M96 SOIC D 16 2500 333.2 345.9 28.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.