Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICs74AC 9 Bit SOIC 14

Data sheet acquired from Harris Semiconductor

SCHS250A

Features

• Buffered Inputs

• Typical Propagation Delay

- 10ns at V

= 5V, T

= 25

C, C

= 50pF

• Exceeds 2kV ESD Protection per MIL-STD-883,

Method 3015

• SCR-Latchup-Resistant CMOS Process and Circuit

Design

• Speed of Bipolar FAST™/AS/S with Signiﬁcantly

Reduced Power Consumption

• Balanced Propagation Delays

• AC Types Feature 1.5V to 5.5V Operation and

Balanced Noise Immunity at 30% of the Supply

• ±24mA Output Drive Current

- Fanout to 15 FAST™ ICs

- Drives 50Ω Transmission Lines

Description

The ’AC280 and ’ACT280 are 9-bit odd/even parity genera-

tor/checkers that utilize Advanced CMOS Logic technology.

Both even and odd parity outputs are available for checking

or generating parity for words up to nine bits long. Even par-

ity is indicated (∑E output is HIGH) when an even number of

data inputs is HIGH. Odd parity is indicated (∑O output is

HIGH) when an odd number of data inputs is HIGH. Parity

checking for words larger than nine bits can be accom-

plished by tying the ∑E output to any input of an additional

’AC280, ’ACT280 parity checker.

Pinout

CD54AC280, CD54ACT280

(CERDIP)

CD74AC280, CD74ACT280

(PDIP, SOIC)

TOP VIEW

Functional Diagram

Ordering Information

PART

NUMBER

TEMP.

RANGE (

C) PACKAGE

CD54AC280F3A -55 to 125 14 Ld CERDIP

CD74AC280E 0 to 70

C, -40 to 85,

-55 to 125

14 Ld PDIP

CD74AC280M 0 to 70

C, -40 to 85,

-55 to 125

14 Ld SOIC

CD54ACT280F3A -55 to 125 14 Ld CERDIP

CD74ACT280E 0 to 70

C, -40 to 85,

-55 to 125

14 Ld PDIP

CD74ACT280M 0 to 70

C, -40 to 85,

-55 to 125

14 Ld SOIC

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to

obtain the variant in the tape and reel.

2. Wafer and die for this part number is available which meets all elec-

trical specifications. Please contact your local TI sales office or cus-

tomer service for ordering information.

∑E

∑O

GND

∑ ODD

∑ EVEN

GND = 7

= 14

NC = 3

August 1998 - Revised May 2000

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

FAST™ is a Trademark of Fairchild Semiconductor.

CD54/74AC280,

CD54/74ACT280

9-Bit Odd/Even Parity Generator/Checker

Summary of content (13 pages)

PAGE 1
CD54/74AC280, CD54/74ACT280 Data sheet acquired from Harris Semiconductor SCHS250A 9-Bit Odd/Even Parity Generator/Checker August 1998 - Revised May 2000 Features data inputs is HIGH. Odd parity is indicated (∑O output is HIGH) when an odd number of data inputs is HIGH. Parity checking for words larger than nine bits can be accomplished by tying the ∑E output to any input of an additional ’AC280, ’ACT280 parity checker.
PAGE 2
CD54/74AC280, CD54/74ACT280 F Absolute Maximum Ratings Thermal Information DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA DC Output Source or Sink Current per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .
PAGE 3
CD54/74AC280, CD54/74ACT280 DC Electrical Specifications (Continued) TEST CONDITIONS PARAMETER Low Level Output Voltage -40oC TO 85oC 25oC -55oC TO 125oC SYMBOL VI (V) IO (mA) VCC (V) MIN MAX MIN MAX MIN MAX UNITS VOL VIH or VIL 0.05 1.5 - 0.1 - 0.1 - 0.1 V 0.05 3 - 0.1 - 0.1 - 0.1 V 0.05 4.5 - 0.1 - 0.1 - 0.1 V 12 3 - 0.36 - 0.44 - 0.5 V 24 4.5 - 0.36 - 0.44 - 0.5 V 75 (Note 6, 7) 5.5 - - - 1.65 - - V 50 (Note 6, 7) 5.
PAGE 4
CD54/74AC280, CD54/74ACT280 Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case) -40oC TO 85oC -55oC TO 125oC SYMBOL VCC (V) MIN TYP MAX MIN TYP MAX UNITS tPLH, tPHL 1.5 - - 239 - - 263 ns 3.3 (Note 9) 7.5 - 26 7.3 - 29 ns 5 (Note 10) 5.4 - 19.1 5.3 - 21 ns 1.5 - - 227 - - 250 ns 3.3 7.2 - 25 7 - 28 ns 5 5.2 - 18.
PAGE 5
PACKAGE OPTION ADDENDUM www.ti.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2009 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PAGE 7
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant CD74AC280M96 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CD74ACT280M96 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CD74AC280M96 SOIC D 14 2500 367.0 367.0 38.0 CD74ACT280M96 SOIC D 14 2500 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.