Datasheet

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CD74FCT245

BiCMOS OCTAL BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCBS721 – JULY 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

BiCMOS Technology With Low Quiescent

Power

Buffered Inputs

Noninverted Outputs

Input/Output Isolation From V

Controlled Output Edge Rates

64-mA Output Sink Current

Output Voltage Swing Limited to 3.7 V

SCR Latch-Up-Resistant BiCMOS Process

and Circuit Design

Package Options Include Plastic

Small-Outline (M) and Shrink Small-Outline

(SM) Packages and Standard Plastic (E) DIP

description

The CD74FCT245 is an octal bus transceiver with 3-state outputs using a small-geometry BiCMOS technology.

The output stages are a combination of bipolar and CMOS transistors that limit the output high level to two diode

drops below V

. This resultant lowering of output swing (0 V to 3.7 V) reduces the power-bus ringing [a source

of electromagnetic interference (EMI)] and minimizes V

bounce and ground bounce and their effects during

simultaneous output switching. The output configuration also enhances switching speed and is capable of

sinking 64 mA.

The CD74FCT245 allows data transmission from the A bus to the B bus or from the B bus to the A bus,

depending upon the logic level at the direction-control (DIR) input. The output-enable (OE

) input can be used

to disable the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The CD74FCT245 is characterized for operation from 0°C to 70°C.

FUNCTION TABLE

INPUTS

OPERATION

OE DIR

OPERATION

L L B data to A bus

L H A data to B bus

H X Isolation

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

E, M, OR SM PACKAGE

(TOP VIEW)

DIR

GND

Summary of content (13 pages)

PAGE 1
CD74FCT245 BiCMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS721 – JULY 2000 D D D D D D D D D E, M, OR SM PACKAGE (TOP VIEW) BiCMOS Technology With Low Quiescent Power Buffered Inputs Noninverted Outputs Input/Output Isolation From VCC Controlled Output Edge Rates 64-mA Output Sink Current Output Voltage Swing Limited to 3.
PAGE 2
CD74FCT245 BiCMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS721 – JULY 2000 logic symbol† 19 OE 1 DIR 2 A1 G3 3 EN1 [BA] 3 EN2 [AB] 18 1 B1 2 A2 A3 A4 A5 A6 A7 A8 3 17 4 16 5 15 6 14 7 13 8 12 9 11 B2 B3 B4 B5 B6 B7 B8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
PAGE 3
CD74FCT245 BiCMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS721 – JULY 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† DC supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V DC input clamp current, IIK (VI < –0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
CD74FCT245 BiCMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS721 – JULY 2000 switching characteristics over recommended operating conditions (unless otherwise noted) (see Figure 1) TA = 25°C TYP PARAMETER FROM (INPUT) TO (OUTPUT) tpd A or B B or A 5 1.5 7 ns ten OE A or B 6 1.5 9.5 ns tdis OE A or B 6 1.5 7.
PAGE 5
CD74FCT245 BiCMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS721 – JULY 2000 PARAMETER MEASUREMENT INFORMATION 7V CL = 50 pF (see Note A) 500 Ω From Output Under Test Test Point From Output Under Test Open TEST GND CL = 50 pF (see Note A) 500 Ω S1 S1 Open 7V Open 7V tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 500 Ω Open Drain LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 90% 1.5 V 10% 3V 1.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device CD74FCT245M96 Package Package Pins Type Drawing SOIC DW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 10.8 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.0 2.7 12.0 24.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CD74FCT245M96 SOIC DW 20 2000 367.0 367.0 45.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.