Datasheet

1
Data sheet acquired from Harris Semiconductor
SCHS125C
Features
• Buffered Inputs
• Typical Propagation Delay: 7ns at V
CC
= 5V,
C
L
= 15pF, T
A
= 25
o
C
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤ 1µA at V
OL
, V
OH
Description
The ’HC02 and ’HCT02 logic gates utilize silicon-gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The HCT logic family is functionally pin
compatible with the standard LS logic family.
Ordering Information
PART NUMBER TEMP. RANGE (
o
C) PACKAGE
CD54HC02F3A -55 to 125 14 Ld CERDIP
CD54HCT02F3A -55 to 125 14 Ld CERDIP
CD74HC02E -55 to 125 14 Ld PDIP
CD74HC02M -55 to 125 14 Ld SOIC
CD74HC02MT -55 to 125 14 Ld SOIC
CD74HC02M96 -55 to 125 14 Ld SOIC
CD74HCT02E -55 to 125 14 Ld PDIP
CD74HCT02M -55 to 125 14 Ld SOIC
CD74HCT02MT -55 to 125 14 Ld SOIC
CD74HCT02M96 -55 to 125 14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
March 1998 - Revised September 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC02, CD74HC02,
CD54HCT02, CD74HCT02
High-Speed CMOS Logic
Quad Two-Input NOR Gate
[ /Title
(CD74H
C02,
CD74H
CT02)
/Subject
(High
Speed
CMOS
Logic
Quad
Two-