Datasheet

1
Data sheet acquired from Harris Semiconductor
SCHS143C
Features
• Three-State Outputs
• Separate Output Enable Inputs
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤ 1µA at V
OL
, V
OH
Description
The ’HC125 and ’HCT125 contain 4 independent three-state
buffers, each having its own output enable input, which when
“HIGH” puts the output in the high impedance state.
Pinout
CD54HC125, CD54HCT125
(CERDIP)
CD74HC125, CD74HCT125
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C) PACKAGE
CD54HC125F3A -55 to 125 14 Ld CERDIP
CD54HCT125F3A -55 to 125 14 Ld CERDIP
CD74HC125E -55 to 125 14 Ld PDIP
CD74HC125M -55 to 125 14 Ld SOIC
CD74HC125MT -55 to 125 14 Ld SOIC
CD74HC125M96 -55 to 125 14 Ld SOIC
CD74HCT125E -55 to 125 14 Ld PDIP
CD74HCT125M -55 to 125 14 Ld SOIC
CD74HCT125MT -55 to 125 14 Ld SOIC
CD74HCT125M96 -55 to 125 14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
1OE
1A
1Y
2
OE
2A
2Y
GND
V
CC
4OE
4A
4Y
3
OE
3A
3Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
November 1997 - Revised August 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC125, CD74HC125,
CD54HCT125, CD74HCT125
High-Speed CMOS Logic
Quad Buffer, Three-State
[
/Title
(
CD74
H
C125
,
C
D74
H
CT12
5
)
/
Sub-
j
ect
(
High
S
peed
C
MOS
L
ogic
Q
uad
B
uffer,
T
hree-
S
tate)