Datasheet

1
Data sheet acquired from Harris Semiconductor
SCHS180C
Features
• Buffered Inputs
• High Current Bus Driver Outputs
• Typical Propagation Delay t
PLH
,t
PHL
= 8ns at V
CC
=5V,
C
L
= 15pF, T
A
= 25
o
C
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤ 1µA at V
OL
, V
OH
Description
The ’HC365, ’HCT365, and ’HC366 silicon gate CMOS three-
state buffers are general purpose high-speed non-inverting
and inverting buffers. They have high drive current outputs
which enable high speed operation even when driving large
bus capacitances. These circuits possess the low power
dissipation of CMOS circuitry, yet have speeds comparable to
low power Schottky TTL circuits. Both circuits are capable of
driving up to 15 low power Schottky inputs.
The ’HC365 and ’HCT365 are non-inverting buffers, whereas
the ’HC366 is an inverting buffer. These devices have two
three-state control inputs (
OE1 and OE2) which are NORed
together to control all six gates.
The ’HCT365 logic families are speed, function and pin
compatible with the standard LS logic family.
Pinout
CD54HC365, CD54HCT365, CD54HC366
(CERDIP)
CD74HC365, CD74HCT365, CD74HC366
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C) PACKAGE
CD54HC365F3A -55 to 125 16 Ld CERDIP
CD54HC366F3A -55 to 125 16 Ld CERDIP
CD54HCT365F3A -55 to 125 16 Ld CERDIP
CD74HC365E -55 to 125 16 Ld PDIP
CD74HC365M -55 to 125 16 Ld SOIC
CD74HC365MT -55 to 125 16 Ld SOIC
CD74HC365M96 -55 to 125 16 Ld SOIC
CD74HC366E -55 to 125 16 Ld PDIP
CD74HC366M -55 to 125 16 Ld SOIC
CD74HC366M96 -55 to 125 16 Ld SOIC
CD74HCT365E -55 to 125 16 Ld PDIP
CD74HCT365M -55 to 125 16 Ld SOIC
CD74HCT365MT -55 to 125 16 Ld SOIC
CD74HCT365M96 -55 to 125 16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and real. The suffix T denotes a small-quantity reel of
250.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
OE1
1A
(1
Y) 1Y
2A
(2
Y) 2Y
3A
GND
(3Y) 3Y
V
CC
6A
6Y (6Y)
5A
5Y (5
Y)
4A
4Y (4
Y)
OE2
November 1997 - Revised October 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54/74HC365, CD54/74HCT365,
CD54/74HC366
High Speed CMOS Logic Hex Buffer/Line Driver,
Three-State Non-Inverting and Inverting
[
/Title
(
CD74
H
C365
,
C
D74
H
CT36
5
,
C
D74
H
C366
,
C
D74
H
CT36
6
)
/
Sub-
j
ect
(
High
S
peed