Datasheet

1
Data sheet acquired from Harris Semiconductor
SCHS199C
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2004, Texas Instruments Incorporated
February 1998 - Revised August 2004
CD74HC4016
High-Speed CMOS Logic
Quad Bilateral Switch
Features
• Wide Analog-Input-Voltage Range . . . . . . . . . 0V to 10V
• Low “ON” Resistance
-45Ω (Typ). . . . . . . . . . . . . . . . . . . . . . . . . . .V
CC
= 4.5V
-35Ω (Typ). . . . . . . . . . . . . . . . . . . . . . . . . . . . V
CC
= 6V
-30Ω (Typ). . . . . . . . . . . . . . . . . . . . . . . . . .1fcV
CC
= 9V
• Fast Switching and Propagation Delay Times
• Low “OFF” Leakage Current
• Built-In “Break-Before-Make” Switching
• Suitable for Sample and Hold Applications
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• HC Types
- 2V to 10V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
Description
The CD74HC4016 contains four independent digitally
controlled analog switches that use silicon-gate CMOS
technology to achieve operating speeds similar to LSTTL
with the low power consumption of standard CMOS
integrated circuits.
Each switch has two input/output terminals (nY, nZ) and an
active high enable input (nE). Current through the switch will
not cause additional V
CC
current provided the analog
voltage is maintained between V
CC
and GND.
Pinout
CD74HC4016
(PDIP, SOIC, TSSOP)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C) PACKAGE
CD74HC4016E -55 to 125 14 Ld PDIP
CD74HC4016M -55 to 125 14 Ld SOIC
CD74HC4016MT -55 to 125 14 Ld SOIC
CD74HC4016M96 -55 to 125 14 Ld SOIC
CD74HC4016PW -55 to 125 14 Ld TSSOP
CD74HC4016PWR -55 to 125 14 Ld TSSOP
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
1Y
1Z
2Z
2Y
2E
3E
GND
V
CC
1E
4E
4Y
4Z
3Z
3Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
[
/Title
(
CD74
H
C4016
)
/
Sub-
j
ect
(
High-
S
peed
C
MOS
L
ogic
Q
uad
B
ilat-