Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - display driver LED 7 segments 1-digit BCD 8 µA PDIP 16

Data sheet acquired from Harris Semiconductor

SCHS217B

Features

• Input Latches for BCD Code Storage

• Blanking Capability

• Phase Input for Complementing Outputs

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55

C to 125

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: N

= 30%, N

= 30% of V

at V

= 5V

Description

The CD74HC4543 high-speed silicon-gate device is a BCD

to 7-segment latch/decoder/driver designed primarily for

directly driving liquid-crystal displays. It has an active-high

disable input (LD), an active-high blanking input (BI) and a

phase input (PH) to which a square wave is applied for

liquid-crystal applications. This square wave also is applied

to the backplane of the liquid-crystal display.

This device also can be used, in conjunction with current

amplifying devices, for driving LEDs, incandescent,

ﬂuorescent, and gas-discharge displays. For these

applications the phase input provides a means to obtain

active-high or active-low segment outputs. (See the Function

Table.)

Pinout

CD74HC4543

(PDIP)

TOP VIEW

Ordering Information

PART NUMBER

TEMP. RANGE

(

C) PACKAGE

CD74HC4543E -55 to 125 16 Ld PDIP

GND

7-SEGMENT

OUTPUTS

BCD

INPUTS

February 1998 - Revised July 2003

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

CD74HC4543

High-Speed CMOS Logic BCD to 7-Segment

Latch/Decoder/Driver for LCDs

[ /Title

(CD74

HC454

Sub-

ect

(High-

Speed

CMOS

Logic

BCD-

to-7

Summary of content (10 pages)

PAGE 1
[ /Title (CD74 HC454 3) /Subject (HighSpeed CMOS Logic BCDto-7 CD74HC4543 Data sheet acquired from Harris Semiconductor SCHS217B High-Speed CMOS Logic BCD to 7-Segment Latch/Decoder/Driver for LCDs February 1998 - Revised July 2003 Features Description • Input Latches for BCD Code Storage The CD74HC4543 high-speed silicon-gate device is a BCD to 7-segment latch/decoder/driver designed primarily for directly driving liquid-crystal displays.
PAGE 2
CD74HC4543 Functional Diagram PH D3 2 11 DRIVER D2 3 DECODER D1 BCD INPUTS 9 10 LATCH D0 6 5 4 12 13 15 14 1 LD a b c 7 - SEGMENT OUTPUTS d e f g 7 BI GND = 8 VCC = 16 FUNCTION TABLE INPUTS OUTPUTS LD BI PH D3 D2 D1 D0 a b c d e f g DISPLAY X H L X X X X L L L L L L L Blank H L L L L L L H H H H H H L 0 H L L L L L H L H H L L L L 1 H L L L L H L H H L H H L H 2 H L L L L H H H H H H L L H 3 H
PAGE 3
CD74HC4543 7 9 BI a 5 D0 Q0 D0 10 b LATCH LD LD Q0 LD LD 11 c 3 D1 D1 Q1 LATCH LD LD 12 d LD Q1 LD LD Dn Qn Qn 2 D2 D2 LD LD Q2 LD LATCH LD LD LD Dn P N Qn LD Q2 LD 13 e P N LD 4 D3 D3 Q3 15 LATCH LD LD f LD Q3 LD 1 LD LD 14 g 6 LD PH FIGURE 1.
PAGE 4
CD74HC4543 Absolute Maximum Ratings Thermal Information DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA DC Output Source or Sink Current per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .
PAGE 5
CD74HC4543 Prerequisite for Switching Specifications 25oC PARAMETER Setup Time Dn to LD -55oC TO 125oC SYMBOL VCC (V) MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS tSU 2 60 - - 75 - - 90 - - ns 4.5 12 - - 15 - - 18 - - ns 6 10 - - 13 - - 15 - - ns 2 30 - - 40 - - 45 - - ns 4.5 6 - - 8 - - 9 - - ns 6 5 - - 7 - - 8 - - ns 2 50 - - 65 - - 75 - - ns 4.
PAGE 6
CD74HC4543 Test Circuits and Waveforms tfCL trCL CLOCK 90% 10% tWL + tWH = tr = 6ns I fCL 50% 50% VCC 90% 50% 10% INPUT VCC 50% 10% tf = 6ns GND GND tTHL tWL tTLH tWH 90% 50% 10% INVERTING OUTPUT NOTE: Outputs should be switching from 10% VCC to 90% VCC in accordance with device truth table. For fMAX, input duty cycle = 50%. tPHL FIGURE 2. HC CLOCK PULSE RISE AND FALL TIMES AND PULSE WIDTH FIGURE 3.
PAGE 7
CD74HC4543 Application Circuits APPROPRIATE VOLTAGE HC4543 OUTPUTS ONE OF SEVEN SEGMENTS COMMON BACKPLANE PH HC4543 OUTPUT SQUARE WAVE GND TO VCC PH GND FIGURE 5. CONNECTION TO LIQUID-CRYSTAL (LCD) DISPLAY READOUT FIGURE 6. CONNECTION TO INCANDESCENT DISPLAY READOUT APPROPRIATE VOLTAGE HC4543 OUTPUT HC4543 PH TO FILAMENT SUPPLY OUTPUT GND PH GND OR APPROPRIATE VOLTAGE BELOW GND GND FIGURE 7. CONNECTION TO GAS-DISCHARGE DISPLAY READOUT FIGURE 8.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty CD74HC4543E ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CD74HC4543EE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
PAGE 9
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