Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Counter Binary counter 74HCT Positive slope 30 MHz SOIC 16 N

 

   

      

SCHS275E − MARCH 2002 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D 2-V to 6-V V

Operation (’HC190, 191)

D 4.5-V to 5.5-V V

Operation (’HCT191)

D Wide Operating Temperature Range of

−55°C to 125°C

D Synchronous Counting and Asynchronous

D Two Outputs for n-Bit Cascading

D Look-Ahead Carry for High-Speed Counting

D Balanced Propagation Delays and

Transition Times

D Standard Outputs Drive Up To 15 LS-TTL

Loads

D Significant Power Reduction Compared to

LS-TTL Logic ICs

description/ordering information

The CD54/74HC190 are asynchronously presettable BCD decade counters, whereas the CD54/74HC191 and

CD54/74HCT191 are asynchronously presettable binary counters.

Presetting the counter to the number on preset data inputs (A−D) is accomplished by a low asynchronous

parallel load (LOAD

) input. Counting occurs when LOAD is high, count enable (CTEN) is low, and the down/up

(D/U

) input is either high for down counting or low for up counting. The counter is decremented or incremented

synchronously with the low-to-high transition of the clock.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

CD74HC190E CD74HC190E

PDIP − E Tube of 25

CD74HC191E CD74HC191E

PDIP − E

Tube of 25

CD74HCT191E CD74HCT191E

Tube of 40 CD74HC191M

SOIC − M

Reel of 2500 CD74HC191M96

HC191M

SOIC − M

Reel of 250 CD74HC191MT

HC191M

−55°C to 125°C

Tube of 40 CD74HCT191M HCT191M

−55°C to 125°C

SOP − NS Reel of 2000 CD74HC190NSR HC190M

Tube of 90 CD74HC190PW

TSSOP − PW

Reel of 2000 CD74HC190PWR

HJ190

TSSOP − PW

Reel of 250 CD74HC190PWT

HJ190

CD54HC190F3A CD54HC190F3A

CDIP − F Tube of 25

CD54HC191F3A CD54HC191F3A

CDIP − F

Tube of 25

CD54HCT191F3A CD54HCT191F3A

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

CD54HC190, 191; CD54HCT191...F PACKAGE

CD74HC190 . . . E, NS, OR PW PACKAGE

CD74HC191, CD74HCT191 ...E OR M PACKAGE

(TOP VIEW)

CTEN

D/U

GND

CLK

RCO

MAX/MIN

LOAD

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Summary of content (32 pages)

PAGE 1
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation (’HC190, 191) D 4.5-V to 5.5-V VCC Operation (’HCT191) D Wide Operating Temperature Range of D D D D D D CD54HC190, 191; CD54HCT191 . . . F PACKAGE CD74HC190 . . . E, NS, OR PW PACKAGE CD74HC191, CD74HCT191 . . .
PAGE 2
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 description/ordering information (continued) When an overflow or underflow of the counter occurs, the MAX/MIN output, which is low during counting, goes high and remains high for one clock cycle. This output can be used for look-ahead carry in high-speed cascading (see Figure 1).
PAGE 3
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 ’HC190 logic diagram B A 15 CLK 1 14 b 5 c D/U LOAD 11 d e f g h i LOAD DATA LOAD DATA T T Q j Q CLKQ CLKQ FF0 FF1 k l m n o 4 p CTEN 3 2 QA POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 QB 3
PAGE 4
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 ’HC190 logic diagram (continued) D C 9 10 13 b RCO c d e f g h i j 12 LOAD DATA LOAD DATA T T Q Q CLK Q CLK Q FF2 FF3 k l m n o p 6 4 7 QC POST OFFICE BOX 655303 QD • DALLAS, TEXAS 75265 MAX/MIN
PAGE 5
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 ’HC191, ’HCT191 logic diagram A C B 15 10 1 14 b CLK D/U 5 c d 11 e f g LOAD LOAD DATA LOAD LOAD DATA DATA T T T Q Q h Q i CLK Q CLKQ CLKQ FF0 FF1 FF2 j k l M N 4 CTEN 3 2 Q B QA POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 6 Q C 5
PAGE 6
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 ’HC191, ’HCT191 logic diagram (continued) D 9 13 b RCO c d 12 e f g h i LOAD DATA T Q CLK Q FF3 j k l m n 7 6 QD POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MAX/MIN
PAGE 7
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 ’HC190 and ’HC191/HCT191 flip-flop DATA LOAD n p LOAD LOAD LOAD CL CL p p p n n p LOAD p n n CK Q CLK CLK Q n CLK T CLK CLK CLK POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7
PAGE 8
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 typical load, count, and inhibit sequence for ’HC190 The following sequence is illustrated below: 1. Load (preset) to BCD 7 2. Count up to 8, 9 (maximum), 0, 1, and 2 3. Inhibit 4.
PAGE 9
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 typical load, count, and inhibit sequence for ’HC191 and ’HCT191 The following sequence is illustrated below: 1. Load (preset) to binary 13 2. Count up to 14, 15 (maximum), 0, 1, and 2 3. Inhibit 4.
PAGE 10
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 Direction Control Enable D/U D/U CE D/U CE CP TC CE CP TC CP TC Clock Figure 1. ’HC190 Synchronous n-Stage Counter With Parallel Gated Terminal Count Direction Control RC D/U Enable D/U RC D/U RC CE CE CE CP CP CP Clock Figure 2.
PAGE 11
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . .
PAGE 12
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 ’HC190, ’HC191 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL TEST CONDITIONS VCC TA = −40°C TO 85°C MIN MIN MIN MAX MAX UNIT MAX 2V 1.9 1.9 1.9 IOH = −20 µA 4.4 4.4 4.4 6V 5.9 5.9 5.9 IOH = −4 mA IOH = −5.2 mA 4.5 V 3.98 3.7 3.84 6V 5.48 5.
PAGE 13
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 ’HC190, ’HC191 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 4) VCC fclock Clock frequency† LOAD low tw Pulse duration CLK high or low Data before LOAD↑ tsu Setup time CTEN before CLK↑ D/U before CLK↑ LOAD↑ Data before LOAD th Hold time CTEN before CLK CLK↑ CLK↑ D/U before
PAGE 14
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 ’HC190, ’HC191 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 4) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE fmax LOAD A, B, C, or D Q Q CL = 50 pF Q RCO CLK MAX/MIN D/U RCO MAX/MIN tt 14 RCO Any MIN MAX 2V 6 4 5 4.
PAGE 15
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 ’HCT191 timing requirements over recommended operating free-air temperature range VCC = 4.
PAGE 16
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd 16 TYP Power dissipation capacitance POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ’HC190 59 ’HC191 55 ’HCT191 68 UNIT pF
PAGE 17
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION − ’HC190, ’HC191 VCC Test Point From Output Under Test PARAMETER S1 ten RL = 1 kΩ tdis CL (see Note A) S2 S1 S2 tPZH Open Closed tPZL Closed Open tPHZ Open Closed tPLZ Closed Open Open Open tpd or tt tw LOAD CIRCUIT VCC Input 50% VCC 50% VCC 0V VOLTAGE WAVEFORMS PULSE DURATION LOAD Input
PAGE 18
SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION − ’HCT191 VCC Test Point From Output Under Test PARAMETER S1 ten RL = 1 kΩ tdis CL (see Note A) S2 S1 S2 tPZH Open Closed tPZL Closed Open tPHZ Open Closed tPLZ Closed Open Open Open tpd or tt tw LOAD CIRCUIT VCC Input 50% VCC 50% VCC 0V VOLTAGE WAVEFORMS PULSE DURATION LOAD Input VCC
PAGE 19
PACKAGE OPTION ADDENDUM www.ti.
PAGE 20
PACKAGE OPTION ADDENDUM www.ti.
PAGE 21
PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production.
PAGE 22
PACKAGE OPTION ADDENDUM www.ti.
PAGE 23
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant CD74HC190NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 CD74HC190PWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 CD74HC190PWT TSSOP PW 16 250 330.0 12.4 6.9 5.6 1.6 8.0 12.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CD74HC190NSR SO NS 16 2000 367.0 367.0 38.0 CD74HC190PWR TSSOP PW 16 2000 367.0 367.0 35.0 CD74HC190PWT TSSOP PW 16 250 367.0 367.0 35.0 CD74HC191M96 SOIC D 16 2500 333.2 345.9 28.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.