Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Multiplexer Multiplexer Single supply SOIC 16 N

Data sheet acquired from Harris Semiconductor

SCHS171D

Features

• Buffered Inputs

• Typical Propagation Delay ( In to Output ) = 12ns at

= 5V, C

= 15pF, T

= 25

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55

C to 125

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: N

= 30%, N

= 30% of V

at V

= 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

= 0.8V (Max), V

= 2V (Min)

- CMOS Input Compatibility, I

≤ 1µA at V

, V

Description

The ’HC257 and ’HCT257 are quad 2-input multiplexers

which select four bits of data from two sources under the

control of a common Select Input (S). The Output Enable

input (

OE) is active LOW. When OE is HIGH, all of the out-

puts (1Y-4Y) are in the high impedance state regardless of

all other input conditions.

Moving data from two groups of registers to four common

output buses is a common use of the 257. The state of the

Select input determines the particular register from which

the data comes. It can also be used as a function generator.

Pinout

CD54HC257, CD54HCT257

(CERDIP)

CD74HC257, CD74HCT257

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBER

TEMP. RANGE

(

C) PACKAGE

CD54HC257F3A -55 to 125 16 Ld CERDIP

CD54HCT257F3A -55 to 125 16 Ld CERDIP

CD74HC257E -55 to 125 16 Ld PDIP

CD74HC257M -55 to 125 16 Ld SOIC

CD74HC257MT -55 to 125 16 Ld SOIC

CD74HC257M96 -55 to 125 16 Ld SOIC

CD74HCT257E -55 to 125 16 Ld PDIP

CD74HCT257M -55 to 125 16 Ld SOIC

CD74HCT257MT -55 to 125 16 Ld SOIC

CD74HCT257M96 -55 to 125 16 Ld SOIC

NOTE: When ordering, use the entire part number. The sufﬁx 96

denotes tape and reel. The sufﬁx T denotes a small-quantity reel of

250.

GND

November 1997 - Revised October 2003

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

CD54HC257, CD74HC257,

CD54HCT257, CD74HCT257

High-Speed CMOS Logic Quad 2-Input

Multiplexer with Three-State Non-Inverting Outputs

[

/Title

(

CD74

C257

D74

CT25

)

Sub-

ect

(

High

peed

MOS

ogic

uad

-Input

ulti-

lexer

Summary of content (16 pages)

PAGE 1
[ /Title (CD74 HC257 , CD74 HCT25 7) /Subject (High Speed CMOS Logic Quad 2-Input Multiplexer CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 Data sheet acquired from Harris Semiconductor SCHS171D November 1997 - Revised October 2003 High-Speed CMOS Logic Quad 2-Input Multiplexer with Three-State Non-Inverting Outputs Features all other input conditions. • Buffered Inputs Moving data from two groups of registers to four common output buses is a common use of the 257.
PAGE 2
CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 Functional Diagram OE 15 1 S 4I1 4I0 13 P 12 4Y N 14 10 3I1 9 11 3I0 6 2I1 3 CIRCUITS IDENTICAL TO CIRCUIT 5 2I0 4 2 1I0 2Y IN ABOVE DASHED ENCLOSURE 3 1I1 7 3Y TRUTH TABLE OUTPUT ENABLE SELECT INPUT OE S I0 I1 Y H X X X Z L L L X L L L H X H L H X L L L H X H H DATA INPUTS OUTPUT H= High Voltage Level L= Low Voltage Level X= Don’t Care Z= High Impedance, OFF State 2 1Y
PAGE 3
CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 Absolute Maximum Ratings Thermal Information DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA DC Drain Current, per Output, IO For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 DC Electrical Specifications (Continued) TEST CONDITIONS SYMBOL VI (V) Quiescent Device Current ICC VCC or GND 0 Three-State Leakage Current IOZ VIL or VIH High Level Input Voltage VIH Low Level Input Voltage High Level Output Voltage CMOS Loads PARAMETER 25oC IO (mA) VCC (V) -40oC TO 85oC -55oC TO 125oC MIN TYP MAX MIN MAX MIN MAX UNITS 6 - - 8 - 80 - 160 µA - 6 - - ±0.5 - ±5 - ±10 µA - - 4.5 to 5.
PAGE 5
CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 Switching Specifications PARAMETER Input tr, tf = 6ns SYMBOL TEST CONDITIONS tPLH, tPHL CL = 50pF 25oC -40oC TO 85oC -55oC TO 125oC VCC (V) TYP MAX MAX MAX UNITS 2 - 150 190 225 ns 4.5 - 30 38 45 ns CL = 15pF 5 12 - - - ns CL = 50pF 6 - 26 33 38 ns CL = 50pF 2 - 175 220 265 ns 4.5 - 35 44 53 ns CL = 15pF 5 14 - - - ns CL = 50pF 6 - 30 37 45 ns CL = 50pF 2 - 150 190 225 ns CL = 50pF 4.
PAGE 6
CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 Test Circuits and Waveforms tr = 6ns tf = 6ns 90% 50% 10% INPUT GND tTLH tPHL 6ns 10% 2.7 1.3 OUTPUT LOW TO OFF 90% OUTPUT HIGH TO OFF 50% OUTPUTS DISABLED FIGURE 3. HC THREE-STATE PROPAGATION DELAY WAVEFORM OTHER INPUTS TIED HIGH OR LOW OUTPUT DISABLE IC WITH THREESTATE OUTPUT GND 1.3V tPZH 90% OUTPUTS ENABLED OUTPUTS ENABLED 0.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant CD74HC257M96 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 CD74HCT257M96 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CD74HC257M96 SOIC D 16 2500 333.2 345.9 28.6 CD74HCT257M96 SOIC D 16 2500 333.2 345.9 28.
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