User manual

USART Introduction: SPI Mode
15-3USART Peripheral Interface, SPI Mode
Figure 15−1. USART Block Diagram: SPI Mode
Receiver Shift Register
Transmit Shift Register
Receiver Buffer UxRXBUF
Transmit Buffer UxTXBUF
LISTEN MM
UCLK
Clock Phase and Polarity
Receive Status
SYNC CKPH CKPL
SSEL1 SSEL0
UCLKI
ACLK
SMCLK
SMCLK
00
01
10
11
OEPE BRK
TXWAKE
UCLKS
UCLKI
Receive Control
RXERR
FE
SWRST USPIEx* URXEIE
URXWIE
Transmit Control
SWRST USPIEx* TXEPT
RXWAKE
SP CHAR PENAPEV
SP CHAR PENAPEV
WUT
SIMO
UTXD
URXD
SOMI
STE
Prescaler/Divider UxBRx
Modulator UxMCTL
Baud−Rate Generator
UTXIFGx*
* Refer to the device-specific datasheet for SFR locations
SYNC
URXIFGx*
01
0
0
0
1
0
1
1
1
0
1
STC
SYNC= 1