User manual

Scan IF Operation
24-19Scan IF
TSM Example
Figure 24−10 shows an example for a TSM sequence. The TSMx register
values for the example are shown in Table 24−6. ACLK and SIFCLK are not
drawn to scale. The TSM sequence starts with SIFTSM0 and ends with a set
SIFSTOP bit in SIFTSM9. Only the SIFTSM5 to SIFTSM9 states are shown.
Table 24−6.TSM Example Register Values
TSMx Register TSMx Register Contents
SIFTSM5 0100Ah
SIFTSM6 00402h
SIFTSM7 01812h
SIFTSM8 00952h
SIFTSM9 00200h
The example also shows the affects of the clock synchronization when
switching between SIFCLK and ACLK. In state SIFTSM6, SIFACLK is set,
whereas in the previous state and the successive state, SIFACLK is cleared.
The waveform shows the duration of SIFTSM6 is less than one ACLK cycle
and the duration of state SIFTSM7 is up to one SIFCLK period longer than
configured by the SIFREPEATx bits.
Figure 24−10. Timing State Machine Example
SIFCLK
SIFEX(tsm)
SIFCA(tsm)
SIFRSON(tsm)
SIFDAC(tsm)
SIFSTOP(tsm)
ACLK
SIFCHx(tsm)
SIFTSM5 SIFTSM6 SIFTSM7 SIFTSM8
SIF
TSM9
SIF
TSM4
10 10 10 00