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12.5.3.2 DSP Module Reset
12.5.3.2.1 Software Reset Disable
www.ti.com ARM Control of DSP Boot, Clock, and Reset
In the software reset disable state, the DSP’s module reset is asserted and its module clock is turned off.
You can use this state to reset the DSP. The following steps describe how to put the DSP in the software
reset disable state:
• ARM: Notify the DSP to prepare for power-down.
• DSP: Put the DSP in the IDLE state:
1. Set the power-down command register (PDCCMD) in the DSP power-down controller (PDC)
module to 0001 5555h.
Note: PDCCMD can only be written while the DSP is in supervisor mode. See the
TMS320DM646x DMSoC DSP Subsystem Reference Guide (SPRUEP8 ) and the
TMS320C64x+ DSP Megamodule Reference Guide (SPRU871 ) for more information on
the power-down controller (PDC).
2. Execute the IDLE instruction if the DSP is in the enable state. IDLE is a program instruction in the
C64x+ CPU instruction set. When the CPU executes IDLE, the PDC is notified and initiates DSP
power-down according to the bits set in PDCCMD. See the TMS320C64x+ DSP Megamodule
Reference Guide (SPRU871 ) for more information on the PDC and the IDLE instruction.
• ARM: Software reset disable DSP:
1. Wait for the GOSTAT[0] bit in the power domain transition status register (PTSTAT) in the PSC to
clear to 0. You must wait for the power domain to finish any previously initiated transitions before
initiating a new transition.
2. Clear the NEXT bit in the module control 1 register (MDCTL1) in the PSC to 0 to prepare the DSP
module for a software reset disable transition.
3. Set the GO[0] bit in the power domain transition command register (PTCMD) in the PSC to 1 to
initiate the state transition.
4. Wait for GOSTAT[0] bit in PTSTAT to clear to 0. The domain is safely in the new state only after
the GOSTAT[0] bit is cleared to 0.
5. Wait for the STATE bit in the module status 1 register (MDSTAT1) in the PSC to change to 0. The
module is safely in the new state only after the STATE bit in MDSTAT1 changes to reflect the new
state.
• ARM: Assert the DSP local reset. Clear the LRST bit in the module control 1 register (MDCTL1) in the
PSC to 0. This step is optional. This step asserts the DSP local reset and is included here so that the
DSP does not start running immediately upon power-on/enable. Typically, software deasserts local
reset sometime after finishing the enable sequence.
SPRUEP9A – May 2008 ARM-DSP Integration 131
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