User manual
6.2 Power Domain and Module Topology
sysclk2
domain
PLL0
sysclk3
domain
sysclk4
domain
sysclk5
domain
sysclk6
domain
sysclk7
domain
sysclk8
domain
sysclk9
domain
sysclk1
domain
sysclkbp
domain
Alwayson
powerdomain
PLL1
sysclk1
domain
Power
24MHZosc
domain
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Power Domain and Module Topology
The DM646x DMSoC system includes only one power domain (Always On) and multiple separate
modules, as shown in Figure 6-2 and summarized in Table 6-1 . The Always On power domain is always in
the ON state when the chip is powered-on. The Always On domain is powered by the CV
DD
pins of the
DM646x DMSoC (see the device-specific data manual). All of the DM646x DMSoC modules reside within
the Always On power domain. See the device-specific data manual for details on the clock domains.
Table 6-1 shows the state of each module after chip power-on/hard reset. The default state of the DSP
module is determined by the DSP boot source (DSPBOOT) pin. If the DSP is selected to self-boot at reset
via this signal, the DSP module is enabled by default. The ARM, Timer2, and System Module are always
enabled.
Figure 6-2. TMS320DM646x DMSoC Power Domain and Module Topology
SPRUEP9A – May 2008 Power and Sleep Controller (PSC) 63
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