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6.5 PSC Interrupts
6.5.1 Interrupt Events
6.5.1.1 Module State Emulation Events
6.5.1.2 Module Local Reset Emulation Events
www.ti.com PSC Interrupts
Note: In the DM646x DMSoC, there is only one power domain (Always On), so all IcePick
commands do not have any control on the power domain and only control module states and
resets.
When emulation tools remove the above commands, the PSC immediately executes a state
transition based on the current values in the NEXT bit in the power domain control n register
(PDCTL n) and the NEXT bit in the module control n register (MDCTL n), as set by software.
The PSC has one interrupt (Table 6-4 ) to the ARM interrupt controller (AINTC). The PSC interrupt is
generated when certain IcePick emulation events occur.
Table 6-4. PSC Interrupt
ARM Event Acronym Source
47 PSCINT PSC
The PSC interrupt is generated when any of the following events occur:
• Module State Emulation Event
• Module Local Reset Emulation Event
These interrupt events are summarized in Table 6-5 and described in more detail in this section.
Table 6-5. PSC Interrupt Events
Interrupt Enable Bits
Control Register Enable Bit Interrupt Condition
MDCTL n EMUIHBIE Interrupt occurs when the emulation alters the module state
MDCTL n EMURSTIE Interrupt occurs when the emulation alters the module's local reset
A module state emulation event occurs when emulation alters the state of a module. Status is reflected in
the EMUIHB bit in the module status n register (MDSTAT n). In particular, a module state emulation event
occurs under the following conditions:
• When inhibit sleep is asserted by emulation and software attempts to transition the module out of the
enable state
• When force active is asserted by emulation and the module is not already in the enable state
A local reset emulation event occurs when emulation alters the local reset of a module. Status is reflected
in the EMURST bit in the module status n register (MDSTAT n). In particular, a module local reset
emulation event occurs under the following conditions:
• When assert reset is asserted by emulation although software deasserted the local reset
• When wait reset is asserted by emulation
• When block reset is asserted by emulation and software attempts to change the state of local reset
SPRUEP9A – May 2008 Power and Sleep Controller (PSC) 67
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