Datasheet

COP8SGE5, COP8SGE7, COP8SGH5

COP8SGK5, COP8SGR5, COP8SGR7

SNOS516E –JANUARY 2000–REVISED APRIL 2013

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DESCRIPTION

The COP8SG Family ROM and OTP based microcontrollers are highly integrated COP8™ Feature core devices

with 8k to 32k memory and advanced features including Analog comparators, and zero external components.

These single-chip CMOS devices are suited for more complex applications requiring a full featured controller with

larger memory, low EMI, two comparators, and a full-duplex USART. COP8SGx7 devices are 100% form-fit-

function compatible OTP (One Time Programmable) versions for use in production or development of the

COP8SGx5 ROM.

Erasable windowed versions (Q3) are available for use with a range of COP8 software and hardware

development tools.

Family features include an 8-bit memory mapped architecture, 15 MHz CKI with 0.67 μs instruction cycle, 14

interrupts, three multi-function 16-bit timer/counters with PWM, full duplex USART, MICROWIRE/PLUS™, two

analog comparators, two power saving HALT/IDLE modes, MIWU, idle timer, on-chip R/C oscillator, high current

outputs, user selectable options ( WATCHDOG™, 4 clock/oscillator modes, power-on-reset), 2.7V to 5.5V

operation, program code security, and 28/40/44 pin packages.

Devices included in this datasheet are:

RAM

Device Memory (bytes) I/O Pins Packages Temperature

(bytes)