Datasheet

COP8SGE5, COP8SGE7, COP8SGH5

COP8SGK5, COP8SGR5, COP8SGR7

SNOS516E –JANUARY 2000–REVISED APRIL 2013

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Reg Contents Contents

Before After

PCU 02 Hex 02 Hex

PCL 05 Hex 0F Hex

Jump Absolute. In this 2-byte instruction, 12 bits of the instruction opcode specify the new contents of the

Program Counter. The upper three bits of the Program Counter remain unchanged, restricting the new Program

Counter address to the same 4 kbyte address space as the current instruction.

(This restriction is relevant only in devices using more than one 4 kbyte program memory space.)

Example: Jump Absolute

JMP 0125

Reg Contents Contents

Before After

PCU 0C Hex 01 Hex

PCL 77 Hex 25 Hex

Jump Absolute Long. In this 3-byte instruction, 15 bits of the instruction opcode specify the new contents of the

Program Counter.

Example: Jump Absolute Long

JMP 03625

Reg/ Contents Contents

Memory Before After

PCU 42 Hex 36 Hex

PCL 36 Hex 25 Hex

Jump Indirect. In this 1-byte instruction, the lower byte of the jump address is obtained from a table stored in

program memory, with the Accumulator serving as the low order byte of a pointer into program memory. For

purposes of accessing program memory, the contents of the Accumulator are written to PCL (temporarily). The

data pointed to by the Program Counter (PCH/PCL) is loaded into PCL, while PCH remains unchanged.

Example: Jump Indirect

JID

Reg/ Contents Contents

Memory Before After

PCU 01 Hex 01 Hex

PCL C4 Hex 32 Hex

Accumulator 26 Hex 26 Hex

Memory

Location 32 Hex 32 Hex

0126 Hex

The VIS instruction is a special case of the Indirect Transfer of Control addressing mode, where the double-byte

vector associated with the interrupt is transferred from adjacent addresses in program memory into the Program

Counter in order to jump to the associated interrupt service routine.

Product Folder Links: COP8SGE5 COP8SGE7 COP8SGH5 COP8SGK5 COP8SGR5 COP8SGR7