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CY29FCT520T

MULTILEVEL PIPELINE REGISTER

WITH 3-STATE OUTPUTS

SCCS011C – MAY 1994 – REVISED NOVEMBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Function, Pinout, and Drive Compatible

With FCT, F Logic, and AM29520

Reduced V

(Typically = 3.3 V) Version of

Equivalent FCT Functions

Edge-Rate Control Circuitry for

Significantly Improved Noise

Characteristics

off

Supports Partial-Power-Down Mode

Operation

Matched Rise and Fall Times

Fully Compatible With TTL Input and

Output Logic Levels

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Single- and Dual-Pipeline Operation Modes

Multiplexed Data Inputs and Outputs

CY29FCT520T

– 64-mA Output Sink Current

32-mA Output Source Current

CY29FCT520ATDMB, CY29FCT520BTDMB

– 32-mA Output Sink Current

12-mA Output Source Current

3-State Outputs

description

The CY29FCT520T is a multilevel 8-bit-wide pipeline register. The device consists of four registers, A1, A2, B1,

and B2, which are configured by the instruction inputs I

, I

as a single four-level pipeline or as two two-level

pipelines. The contents of any register can be read at the multiplexed output at any time by using the

multiplex-selection controls (S

and S

The pipeline registers are positive-edge triggered, and data is shifted by the rising edge of the clock input.

Instruction I = 0 selects the four-level pipeline mode. Instruction I = 1 selects the two-level B pipeline, while I = 2

selects the two-level A pipeline. I = 3 is the hold instruction; no shifting is performed by the clock in this mode.

In the two-level operation mode, data is shifted from level 1 to level 2 and new data is loaded into level 1.

This device is fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

CLK

GND

D, P, OR SO PACKAGE

(TOP VIEW)

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (13 pages)

PAGE 1
CY29FCT520T MULTILEVEL PIPELINE REGISTER WITH 3-STATE OUTPUTS SCCS011C – MAY 1994 – REVISED NOVEMBER 2001 D D D D D D D D D D D D D, P, OR SO PACKAGE (TOP VIEW) Function, Pinout, and Drive Compatible With FCT, F Logic, and AM29520 Reduced VOH (Typically = 3.
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CY29FCT520T MULTILEVEL PIPELINE REGISTER WITH 3-STATE OUTPUTS SCCS011C – MAY 1994 – REVISED NOVEMBER 2001 PIPELINE INSTRUCTION TABLE I=1 I=0 I1 = 0 I0 = 0 A1 B1 A2 B2 I=2 I=3 I1 = 0 I0 = 1 I1 = 1 I0 = 0 A1 B1 A1 B1 A2 B2 A2 B2 Single four-level I1 = 1 I0 = 1 A1 B1 A2 B2 Dual two-level Hold ORDERING INFORMATION SOIC – SO –40°C to 85°C SOIC – SO DIP – P SOIC – SO 55°C to 125°C –55°C SPEED (ns) ORDERABLE PART NUMBER Tube 6.0 CY29FCT520CTSOC Tape and reel 6.
PAGE 3
CY29FCT520T MULTILEVEL PIPELINE REGISTER WITH 3-STATE OUTPUTS SCCS011C – MAY 1994 – REVISED NOVEMBER 2001 logic diagram D0–D7 8 Instruction Register Controls I0 I1 MUX MUX CLK Multiplex Selection S0 S1 Octal Register A1 Octal Register B1 Octal Register A2 Octal Register B2 MUX OE 8 Y0–Y7 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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CY29FCT520T MULTILEVEL PIPELINE REGISTER WITH 3-STATE OUTPUTS SCCS011C – MAY 1994 – REVISED NOVEMBER 2001 recommended operating conditions (see Note 3) CY29FCT520ATDMB CY29FCT520BTDMB CY29FCT520T UNIT MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.
PAGE 5
CY29FCT520T MULTILEVEL PIPELINE REGISTER WITH 3-STATE OUTPUTS SCCS011C – MAY 1994 – REVISED NOVEMBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued) PARAMETER CY29FCT520ATDMB CY29FCT520BTDMB TEST CONDITIONS MIN ICCD¶ VCC = 5.5 V, Outputs open, One bit switching at 50% duty cycle, OE = GND, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V VCC = 5.25 V, Outputs open, One bit switching at 50% duty cycle, OE = GND, VIN ≤ 0.2 V or VIN ≥ VCC – 0.
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CY29FCT520T MULTILEVEL PIPELINE REGISTER WITH 3-STATE OUTPUTS SCCS011C – MAY 1994 – REVISED NOVEMBER 2001 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) CY29FCT520ATDMB MIN tw Pulse duration, CLK high or low tsu S t time, Setup ti before b f CLK↑ th Hold time, time after CLK↑ CY29FCT520BTDMB MAX MIN 8 6 Data 6 2.8 I 6 4.
PAGE 7
CY29FCT520T MULTILEVEL PIPELINE REGISTER WITH 3-STATE OUTPUTS SCCS011C – MAY 1994 – REVISED NOVEMBER 2001 PARAMETER MEASUREMENT INFORMATION 7V From Output Under Test From Output Under Test Test Point CL = 50 pF (see Note A) Open TEST GND CL = 50 pF (see Note A) 500 Ω S1 500 Ω S1 Open 7V Open tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 500 Ω LOAD CIRCUIT FOR 3-STATE OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw tsu 3V 1.5 V Input 1.5 V th 3V 1.5 V Data Input 1.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.com 21-Mar-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
PAGE 10
MECHANICAL DATA MCER004A – JANUARY 1995 – REVISED JANUARY 1997 JT (R-GDIP-T**) CERAMIC DUAL-IN-LINE 24 LEADS SHOWN PINS ** A 13 24 B 1 24 28 A MAX 1.280 (32,51) 1.460 (37,08) A MIN 1.240 (31,50) 1.440 (36,58) B MAX 0.300 (7,62) 0.291 (7,39) B MIN 0.245 (6,22) 0.285 (7,24) DIM 12 0.070 (1,78) 0.030 (0,76) 0.100 (2,54) MAX 0.320 (8,13) 0.290 (7,37) 0.015 (0,38) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.014 (0,36) 0.008 (0,20) 0.
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